Title: Trend and Opportunities for High-Speed (GS/s) ADCs

Title: Trend and Opportunities for High-Speed (GS/s) ADCs
Abstract: Analog to digital converter (ADC) is a critical building block for most electronic systems. Many
wideband electronic systems (such as wireless and wireline communications) favor digitization of analog
signal with increasing bandwidth (>GHz) and fidelity; at the same time, demand a low area/power
consumption. It leads to a great interest in high-speed ADCs in recent years. In this talk, I will describe
the recent trend of high-speed (>GS/s) ADC. Many existing works leverage massively interleaved SAR
ADCs. On the other hand, there are emerging opportunities to quantize the analog signal in time domain
with high speed. I will introduce a few ADC architectures and/or techniques that demonstrate promises
in achieving high conversion rate but at a low area and/or power consumption, including some silicon
examples developed in my research group.
Speaker(s): Mike Chen,
Agenda:
Networking: 4:00 pm – 5:00 pm (PT)
Presentation: 5:00 pm – 6:00 pm (PT)
Room: 116, Bldg: Bergin Hall, 500 El Camino Real, Santa Clara University, Santa Clara, California, United States, 95053