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In-person networking starts at 6:30PM Talk: 7:00 PM to 8:00PM Abstract: In this talk, audience will be introduced to the fundamentals and the latest technology concepts of automotive millimeter wave 4D imaging radar which has become an essential part of the autonomous vehicles. An overview of key signal processing challenges, such as MIMO waveform processing and sparse array angle estimation, among others, will also be discussed. Speaker(s): Ryan Wu, Room: 1308, Bldg: 402, 500 El Camino Real, Sobrato Campus for Discovery and Innovation, Santa Clara, California, United States, 95053, Virtual: https://events.vtools.ieee.org/m/506686 |
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Inferencing has become ubiquitous across cloud, regional, edge, and device environments, powering a wide spectrum of AI use cases spanning vision, language, and traditional machine learning applications. In recent years, Large Language Models (LLMs), initially developed for natural language tasks, have expanded to multimodal applications including vision speech, reasoning and planning each demanding distinct service-level objectives (SLOs). Achieving high-performance inferencing for such diverse workloads requires both model-level and system-level optimizations. This talk focuses on system-level optimization techniques that maximize token throughput and minimize cost per token, maintaining achieve meeting user experience metrics and inference service-provider efficiency. We review several recent innovations including KV caching, Paged/Flash/Radix Attention, Speculative Decoding, and KV Routing, and explain how these mechanisms enhance performance by reducing latency, memory footprint, and compute overhead. These techniques are implemented in leading open-source inference frameworks such as vLLM, SGLang, Hugging Face TGI, and NVIDIA NIM, which form the backbone of large-scale public and private LLM serving platforms. The use of GPU Training, Inference and Analysis clusters with Multi-Instance-GPU's (MIG), and Federated Models with QML applications is now become practical. Attendees will gain a practical understanding of the challenges in delivering scalable, low-latency LLM inference, and of the architectural and algorithmic innovations driving next-generation high-performance inference systems. Co-sponsored by: eMerging Open Tech Foundation Speaker(s): Ravishankar, Agenda: - Introduction to INGR with AIML & QIT working groups (Baw Chng + Prakash Ramchandran) - 10 mts - High Performance Inferencing for LLMs - By Dr. Ravishankar Ravindran ( Tech. Director eOTF - Advisory) -60 mts - Q&A - 20 mts Virtual: https://events.vtools.ieee.org/m/508671 |
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IEEE EMC Chapter is sponsoring the event but no monetary gain is gained or funded by the chapter. Location: Cadence Design Systems, Bldg 5, 2655 Seely Ave., San Jose, CA Registration link will bring you to the options of the Paid workshop but also to the Free Exhibit/TC events 2025 Silicon Valley Area Workshop on EMC Design of High-Speed Systems workshop with Free Exhibit and Free IEEE EMC Technical Committee 10 on Signal and Power Integrity meeting. For more details on the specific agenda including abstract and speakers' bio, go to https://drive.google.com/file/d/1oHHiBJtyebP1JgqafZF65pR9A0y145uA/view?usp=sharing Agenda: Agenda Table-top Vendor Exhibit in Lobby from 10:20 AM – 2:25 PM (FREE) Vendors are still signing up and already include Rohde and Schwarz, PCB Automation, Nexperia, Cadence Design Systems, PacketMicro, and Clear Signal Solutions 8:30 AM Light breakfast and registration 9:00 AM Welcome remarks and introductions Electromagnetic Compatibility 9:10 AM EMC Applications of 3D Printable Materials Dr. Victor Khilkevich, Missouri Univ. of Sci. and Tech. 9:45 AM Model-based EMC Analysis and Diagnosis towards Design-for-EMC Dr. Dipanjan Gope, SimYog Technology and Indian Institute of Science 10:20 AM Break and vendor table-top show (FREE) 10:45 AM Modeling ESD Protection for High-Speed Applications Dr. Daryl Beetner, Missouri Univ. of Sci. and Tech. 11:20 AM Round Table Discussion - Future directions and challenges in EMC 11:50 AM Lunch 12:50 PM Challenges and Opportunity for Data Center Generation and Distributions Dr. Zhiping Yang, PCB Automation 1:25 PM Machine Learning-Assisted Power Delivery Network Design Dr. Chulsoon Hwang, Missouri Univ. of Sci. and Tech. 2:00 PM Break and vendor table-top show (FREE) 2:25 PM Challenges with next generation interconnect solutions Stephen Scearce, Amphenol 3:00 PM Round Table Discussion - Future directions and challenges in SIPI for High- Speed Systems 3:30 PM Happy Hour sponsored by Cadence Design Systems (FREE) IEEE EMC Mini Seminar-Paper Series Sponsored by IEEE EMC Society Technical Committee 10 on Signal and Power Integrity (FREE) 3:30PM~4PM: Machine Learn fro EMC/SI/PI-Blackbox, Physics Recovery and Decision Making. by Lijun Jiang. Professor of MST 4PM~4:30PM: CVRM with Feedback for Platform PDN PI Design. by Kinger Cai of Arm 4:30PM~5PM: Developing an open S-parameter visualizer with assistance from AI. by Giorgi Maghlakelidze of nVidia. 5PM~5:30PM: Machine learning model for a trace referenced to meshed ground planes. by Xiaoyan Xiong of Cadence. 4:00 PM End of program Bldg: 5, 2655 Seely Ave., San Jose, California, United States, 95134
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Abstract: Semiconductor Tool maintenance is a complex task due to process complexity, process integration challenges, and customer requirements. Historically, maintenance strategies have been reactive due to these complexities. Applied Materials has been focused on moving from a generally reactive method of reacting to tool issues to prescriptive methods of maintaining process equipment. This migration is through a combination of advanced anomaly detection techniques which provide low false positives, methods of translating fail modes into Reactive Useful Life estimates and ultimately prescribing solutions to issues in advance using Generative Artificial Intelligence. This discussion will cover some of the challenges and solutions to this framework. Speaker(s): Mike, Agenda: 6:00 - 6:30 - Networking and light dinner (for in person attendees) 6:30 - 7:30 - Talk and Q & A 7:30 - 8:00 - Wrap up and Networking Room: SCDI 4010, Bldg: Sobrato Campus for Discovery and Innovation, Santa Clara University, 500 El Camino Real, Santa Clara, California, United States, 95053, Virtual: https://events.vtools.ieee.org/m/506966 |
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Join us for an evening of AI safety talks and conversations, and get to know researchers and practitioners working on some of the most important safety challenges of our time! The(https://www.linkedin.com/company/sfcomputersociety/) and (https://www.leoniscap.com/) are throwing a mixer at the Hanwha AI Center in downtown SF. Whether you're deep in safety research, building enterprise safeguards, or thinking about safety-related startups ideas, come hang out. We'll have drinks and bites while you chat with researchers, founders, and others who spend their days figuring out how to make advanced AI systems actually safe and beneficial. Our co-host (https://www.leoniscap.com/) is a research-driven VC fund based in Silicon Valley. We invest in Seed and Pre-Seed stage companies building AI-native products. Planned Agenda - 5:30 Open Doors + Networking - 6:00 Talk 1: (https://www.linkedin.com/in/billstout/) (Technical Director AI Product Security, (https://www.linkedin.com/company/servicenow/)) - A layered Enterprise Architecture approach to AI Red Teaming and ownership - 6:20 Talk 2: (https://www.linkedin.com/in/bbartoldson/) (Researcher, (https://www.linkedin.com/company/lawrence-livermore-national-laboratory/)) - AI Safety at Scale - 6:40 Talk 3: (https://www.linkedin.com/in/fadyyanni/) (Co-Founder, (https://www.linkedin.com/company/hackapromptle/)) - Prompt injection risk landscape - 7:00 Panel: (https://www.linkedin.com/in/sinharanjan/) (Fellow & CTO, (https://www.linkedin.com/company/ibm/), Enterprise AI and Data) - Operationalizing AI Safety - 7:30 Networking + Mixer See talk details on (https://luma.com/ksfp5s1t) Speaker(s): Bill Stout, Brian Bartoldson, Fady Yanni Room: Suite 500, 300 Grant Ave , San Francisco, California, United States, 94108
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We will watch this 40-minute video, which describes how AI is revolutionizing engineering management and people development at one company. The talk explores the practical applications of AI for enhancing leadership capabilities, from conducting data-driven one-on-ones to delivering impactful feedback and effective performance reviews. It shows how AI can help identify performance patterns, prepare for difficult conversations, and generate meaningful insights for team development. Real-world examples and hands-on strategies are presented to illustrate the concepts. The presentation explores how combining AI with structured documentation methods can transform our management approaches. The (https://www.youtube.com/watch?v=4D4pESKKiv8) is entitled: “Devoxx Greece 2025 – Engineering Management in the AI Era” by Dennis Nerush who is Director of AI Engineering at Elementor, with over 15 years of experience in development, management, and engineering leadership. After watching the video, we will discuss how we think and feel about its contents. Join us to share your thoughts on how to use AI in engineering management. The goal is for us to walk away with actionable techniques to leverage AI in developing stronger engineering teams while maintaining authentic human connections. [] Parking info: (1) There are some 2-hour and some 4-hour parking spaces on Benton / Sherman and Franklin streets. (2) There are a number of 2-hour parking spaces next to Bank of America / Starbucks and they are usually not crowded on weeknights. You have to walk across El-Camino traffic light pedestrian crossing. If you get there at 6:20 PM you can park until 8:20PM. (3) Enter at the door of the Sobrato building colored in YELLOW. Room: 1302, Bldg: SCDI, Santa Clara University, Santa Clara, California, United States, Virtual: https://events.vtools.ieee.org/m/512221 |
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Achieving efficient p-type doping in gallium nitride (GaN) and its alloys remains one of the most critical challenges in realizing the full potential of III-nitride semiconductors for high-power electronics, deep-ultraviolet (DUV) optoelectronics, and quantum information technologies. While magnesium is the conventional acceptor dopant, its high ionization energy (≈0.22 eV in GaN and up to 0.6 eV in AlN) limits hole concentrations to below ~1% activation efficiency, constraining device performance. Our recent work explores beryllium as an alternative acceptor in (Al,Ga)N, leveraging metal-organic chemical vapor deposition (MOCVD) to achieve high-quality, low-defect epitaxial growth. Through extensive photoluminescence and time-resolved spectroscopy studies of over fifty MOCVD grown Be-doped GaN samples, we identified the UVLBe band at ~3.38 eV as a signature of a shallow Be-related acceptor with an ionization energy of ~113–114 meV — significantly shallower than Mg in GaN. Complementary theoretical studies support the assignment of this shallow state to the BeGaONBeGa complex, suggesting a pathway toward achieving p-type conductivity in AlGaN and even AlN alloys. In recent limited MOCVD growth studies on co-doping with oxygen and Be, we have observed preliminary indications that oxygen incorporation can enhance the signature of the shallow Be acceptor, though further work is needed to fully establish the efficacy and stability of this co-doping strategy. These results provide new insight into the nature of Be-related defects in GaN and AlGaN, and they highlight co-doping pathways as a promising route to overcome the long-standing bottleneck of achieving high hole concentrations. When: Friday, November 7th, 2025 – 11:45AM to 1PM (PDT) 11:45AM - 12PM: Intro 12PM-12:45PM: Lecture 12:45PM-12:55PM: Q&A 1PM Adjourn Bio: Dr. F. Shadi Shahedipour-Sandvik is a Professor of Engineering at the State University of New York, where she leads research on wide bandgap III-nitride semiconductor materials and devices for applications in lighting, power electronics, sensing, and quantum information science. Her work spans two decades of innovation and pioneering work in (Al,In) GaN materials and device engineering, with contributions ranging from high-efficiency p-type doping techniques and defect engineering and characterization to novel photocathodes and betavoltaic devices. She has authored nearly 200 publications and delivered invited talks worldwide on growth, characterization, device physics with applications in emitters, power electronics, and detectors. Shahedipour-Sandvik lab has been continuously funded by a variety of sources including NSF, ARL/ARO, DARPA, DOE, ARPA-E, NASA, and by industry. She has advised more than a dozen Ph.D. students, many of whom now hold technical leadership positions in national labs, and industry. She served as Editor-in-Chief of the Journal of Electronic Materials (2015–2024) and has been recognized with the SUNY Excellence in Research Award and the IBM Faculty Award, among other honors. Virtual: https://events.vtools.ieee.org/m/502836 |
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The Product Safety Engineering Society Bay Area Joint Section Chapter (SCV/SF/OEB) invites you to a virtual meetup of professionals interested in product safety and compliance. We will discuss the future of the chapter and plan future events. Agenda: - Business Meeting - Plan future activity of the chapter - New Officer Elections Virtual: https://events.vtools.ieee.org/m/507461
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This is a hybrid in-person and online event. Pre-registration is required for either. >> DIFFERENT LOCATION FOR IN-PERSON MEETING THIS MONTH! This presentation will discuss the pioneering microprocessor R&D efforts at Bell Labs in 1976-1982 which created a new chip architecture and physical design. New test and verification methods were needed to overcome challenges in CMOS fabrication, and many of this project’s inventions were forerunners of subsequent VLSI developments: - high-speed domino circuits to reduce complex logic gate delay times, - a twin-tub CMOS process for improved power efficiency and performance, - interconnect-centric logic design for signal delay reduction, - gate-matrix layout which increased density, - 32-bit wide internal and external transfers, and - instructions which implemented certain UNIX operating system and C programming language operations As explained by Michael Condry in an (https://spectrum.ieee.org/bellmac-32-ieee-milestone), this device was designed with the intention of carrying both voice and computation into the future, and CMOS was seen as a promising—but risky—alternative to the NMOS and PMOS designs then in use. During this talk, three of the project leaders will describe how their team overcame numerous obstacles, and how they exceeded their speed goal with a 6.4 MHz device in 2.5 micrometer CMOS technology. These efforts created the BELLMAC-32 series of microprocessors, whose applications included telephony products. Their work was recognized this year with an (https://ieeemilestones.ethw.org/Milestone-Proposal:Development_of_the_Bellmac_Microprocessor,_1980). Speaker(s): Michael Condry, Sung (Steve) Mo Kang , Victor Huang 925 Thompson Place, Sunnyvale, California, United States, 94085, Virtual: https://events.vtools.ieee.org/m/507828 |
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Free Registration (with a Zoom account; you can get one for free if you don't already have it. This requirement is to avoid Zoom bombing. Please sign in using the email address tied to your Zoom account — not necessarily the one you used to register for the event.): https://sjsu.zoom.us/meeting/register/qGy644m7StmKMra3Xs_x2g Synopsis: Please feel free to check out the work and thoughts of Prof. Alice Smith, Ph.D., https://en.wikipedia.org/wiki/Alice_E._Smith, https://www.eng.auburn.edu/~aesmith/ on Google Scholar at https://scholar.google.com/citations?hl=en&user=3WhioLIAAAAJ&view_op=list_works&sortby=pubdate, YouTube https://www.youtube.com/results?search_query=%22alice+smith%22+auburn and generally on the Internet. Then, please feel free to submit your questions - via Twitter by using the hashtag, #ProfSmithAMA and tagging @vishnupendyala - emailing vspendyala(at)hotmail(dot)com with #ProfSmithAMA in the subject - during your registration on Zoom Selected questions will be answered by Prof. Smith during the session. Audience may be able to ask follow-up questions during the session, using the Chat feature. --------------------------------------------------------------- By registering for this event, you agree that IEEE and the organizers are not liable to you for any loss, damage, injury, or any incidental, indirect, special, consequential, or economic loss or damage (including loss of opportunity, exemplary or punitive damages). The event will be recorded and will be made available for public viewing. Co-sponsored by: Vishnu S. Pendyala, SJSU Speaker(s): Dr. Vishnu S. Pendyala, Prof. Alice Smith Virtual: https://events.vtools.ieee.org/m/498694
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The San Francisco Bay Area chapter of the IEEE Computer Society invites to our free and open Virtual Tech Talks (no IEEE membership required): First Speaker: Swetha Manohar RM ((https://www.linkedin.com/in/-swethavbenchsales)) Title: Artificial Intelligence HR: Candidature for Foreign Job Recruitment and India Recruitment Abstract: In international job markets, artificial intelligence (AI) is transforming HR recruitment. Language translation, automated resume screening, cultural fit evaluation, and international talent acquisition are all made possible by AI-powered solutions. AI broadens the talent pool, offers individualized assistance, and forecasts talent requirements using predictive analytics. The advantages include cost savings, better hiring decisions, enhanced candidate experience, and higher efficiency. Integration with current HR systems, bias prevention, and data quality are among the difficulties. Businesses may improve the efficacy, efficiency, and candidate experience of recruitment by utilizing AI. AI-powered HR tools, including standalone programs and comprehensive platforms, streamline HR functions like hiring, payroll, performance reviews, and employee engagement, enhancing efficiency, accuracy, and allowing HR professionals to focus on strategic initiatives. Bio: I am a dedicated and results-driven professional with over 16 years of experience in end-to-end Technical Recruitment, Bench Sales, Consultant and Vendor Management, and Training & Development. I have provided services to top U.S. IT companies, helping them acquire the best resources for their job requirements. My expertise lies in handling all types of technical requirements, identifying top consultants, and successfully placing our H1B candidates in leading IT firms across the U.S. Skilled in technologies such as Java, .NET, Oracle, and Clinical SAS, I take pride in building strong vendor relations and driving organizational growth. Second Speaker: Sri Budaraju ((http://linkedin.com/in/ambareesh-b-323b98270)) Title: Can Simple Regression Compete with Artificial Intelligence? Exploring the Overlap Between Classical Statistics and Modern AI Abstract: This talk explores the comparison of classical regression models, often taught in an introductory statistics course, compared with the modern AI and machine learning models in predicting real-world outcomes. Using real datasets from reputed sources like Kaggle, this research dives into comparing the accuracy of simple linear and logistic regression methods to the more complex AI systems. This highlights the surprising power of simple statistical techniques and situations in which they are more applicable compared to bigger models for their interpretability and how they play a vital role in the realm of Artificial Intelligence. Bio: Sri Budaraju (Ambareesh) is an honors student at Las Positas where he is an avid researcher in fields of mathematics & computer science. Sri is experienced in the realm of research as he previously was researching micropropagation and organogenesis in the field of Biotechnology. Sri has been invited and presented his research works at various conferences such as Mission College Symposium & Expo and other ASDRP associated online conferences as well. Speaker(s): Sri Budaraju, Swetha Manohar Virtual: https://events.vtools.ieee.org/m/512749 |
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Rethinking Chip Design to deliver Faster, Smarter, More Compact Solutions [] Abstract: CDimension is rethinking chip design from the ground up, delivering solutions that are faster, smarter, and more compact. We’re moving beyond the limitations of traditional technology. Our foundational innovations in advanced materials and semiconductor integration unlock unprecedented gains in performance, efficiency, and scalability – ranging from 10x to 1,000x times greater than current approaches. Our first milestone: the commercial release of ultra-thin 2D semiconductor materials — a foundational step toward our vision of vertically integrated systems that unify compute, memory, and power. [] [] Speaker: Dr. Jiadi Zhu CEO CDimension Jiadi Zhu is the CEO and founder of CDimension, a company rethinking chip design to deliver faster, smarter, more compact solutions for the most demanding and complex computing workloads. His vision is to redefine how chips are designed, not just for higher performance, but for fundamentally better structure and efficiency. Jiadi’s technical foundation spans over a decade of work at the frontier of 2D materials, monolithic 3D integration, and device scaling. He earned his Ph.D. in Electrical Engineering from the Massachusetts Institute of Technology and has been recognized across both academia and industry for his originality in device design, novel semiconductor materials, and integration. His research–from MIT to the lab bench of CDimension–has focused on how to break architectural bottlenecks through physics-aware, layout-driven design. Jiadi’s research has been widely cited in the field and published and presented in top-tier journals and conferences, including Nature Nanotechnology and IEEE’s International Electron Devices Meeting. Jiadi’s transition from research into startup leadership has drawn attention from leaders in semiconductors, high-performance computing, and next-generation AI hardware. Today, under Jiadi’s leadership, CDimension is overcoming the limitations of traditional chip architectures and delivering significantly better performance, efficiency, and scalability across modern computing environments. AGENDA: Thursday November 13, 2025 11:30 AM: Networking, Pizza & Drinks Noon -- 1 pm: Seminar Please register on Eventbrite before 9:30 AM on Thursday November 13, 2025 $4 IEEE members $6 non IEEE members (discounts for unemployed and students ) See examplesAdd Co-sponsored by: 636940-Santa Clara Valley Section Chapter,EMB18 Bldg: ==> Use corner entrance: Kifer Road / San Lucar Court ==> Do not enter at main entrance on Kifer Road, EAG Labs, 810 Kifer Road, Sunnyvale, California, California, United States, 95051
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The rapid growth of 3D advanced packaging introduces new challenges in inspection and failure analysis, where complex structures such as microbumps, redistribution layers (RDLs), and through-silicon vias (TSVs) demand reliable non-destructive testing (NDT). Conventional approaches, including Scanning Acoustic Microscopy (SAM) and X-ray imaging, are limited by noise, resolution, and defect visibility, creating barriers for reproducible and scalable analysis. To address these challenges, our work advances an AI-powered multimodal inspection framework that couples physics-informed machine learning with structured data infrastructure. A Physics-Informed Neural Network (PINN) approach enhances SAM imaging by embedding acoustic wave physics into reconstructions, producing higher-fidelity images validated through structural similarity and physical accuracy metrics. Complementing this, multimodal data fusion across SAM, X-ray laminography, optical microscopy, and CT establishes richer defect detection and cross-validation. Central to this effort is the creation of multimodality benchmark datasets built on standardized acquisition protocols, structured metadata schemas, and annotation pipelines. These datasets provide not only a foundation for AI model training but also enable reproducibility, traceability, and interoperability across future programs. Speaker(s): Navid Asadi, Virtual: https://events.vtools.ieee.org/m/498529 |
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This virtual meeting can accommodate up to 100 attendees. While military systems in general have to operate in tough electromagnetic environments, missile programs require special attention and considerations from an EMI/EMC perspective. From environments to requirements to best practices, this presentation will discuss key focuses of EMI/EMC engineering in relation to missile programs and systems and how best to achieve success. (https://ieeemeetings.webex.com/ieeemeetings/j.php?MTID=mbb61f437f2f2fef1c8778ed46bd30bd7) https://ieeemeetings.webex.com/ieeemeetings/j.php?MTID=mbb61f437f2f2fef1c8778ed46bd30bd7 Meeting number: 2530 212 5565 Meeting password: HBnRPPXg282 Join from a video system or application Dial 25302125565@ieeemeetings.webex.com You can also dial 173.243.2.68 and enter your meeting number. To dial from an IEEE Video Conference System: *1 2530 212 5565 Tap to join from a mobile device (attendees only) (tel:%2B1-415-655-0002,,*01*25302125565%23%23*01*) United States Toll (tel:1-855-282-6330,,*01*25302125565%23%23*01*) United States Toll Free Speaker(s): Flynn Lawrence, Flynn Lawrence Virtual: https://events.vtools.ieee.org/m/508800 |
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Millimeter-wave (mmWave) power amplifiers (PAs) are critical building blocks in next-generation radar, satellite, defense, and 6G communication systems, where output power, bandwidth, and efficiency must be achieved under stringent size, weight, and power (SWaP) constraints. Among the enabling technologies, Gallium Arsenide (GaAs) and Gallium Nitride (GaN) continue to dominate due to their complementary strengths in linearity, noise performance, and high-power density. This talk will focus on design considerations unique to mmWave GaAs and GaN PAs, with particular emphasis on stability and biasing challenges at frequencies above 20 GHz. Unlike lower microwave designs, mmWave PAs are highly susceptible to low-frequency oscillations, odd-mode instabilities, and bias-induced resonances. To mitigate these, stability networks—ranging from RC shunt loading and resistive feedback to series loading and quarter-wave stabilization—must be co-optimized with matching and biasing schemes. Special attention will be given to the integration of stability networks with bias networks, where parasitics from bias chokes, decoupling capacitors, and high-impedance bias lines can introduce additional poles/zeros in the response, affecting both gain flatness and unconditional stability. The presentation will review practical approaches to stabilizing mmWave PAs without compromising efficiency or bandwidth, including the use of lossy transmission lines, broadband bias tees, and RC filtering strategies tailored for GaAs vs. GaN processes. Case studies will illustrate how bias network design impacts stability margins and overall PA performance, and how distributed versus lumped stabilization choices evolve with frequency. The session will conclude with a discussion of packaging and integration considerations, where bondwire inductances, via transitions, and LTCC/SiP bias routing play a defining role in amplifier stability at mmWave frequencies. Speaker(s): Asmita Dani, Room: 4021, Bldg: Sobrato Campus for Discovery and Innovation, Santa Clara University, 500 El Camino Real, Santa Clara, California, United States, 95054, Virtual: https://events.vtools.ieee.org/m/505939
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Hosted via Google Meet - https://meet.google.com/pqw-trcy-xpg The financial industry is entering a new phase of intelligence—one where AI systems are no longer just analytical tools but autonomous collaborators capable of interpreting goals, reasoning over complex data, and taking context-aware actions. This talk explores the emergence of agentic AI systems in finance—AI architectures designed with intent, memory, and decision agency at their core. We’ll examine how these systems differ from traditional automation by introducing the concept of goal-driven autonomy: agents that plan, execute, and self-reflect across dynamic financial environments. Drawing from real-world applications such as loan underwriting, portfolio monitoring, and compliance intelligence, the session will unpack how planners, executors, and reflectors interact within an agentic loop to make transparent, auditable decisions. The discussion will also highlight enabling technologies—large language models as reasoning engines, retrieval-augmented generation (RAG+) for contextual grounding, and knowledge graphs for structured memory—and how they converge to form adaptive decision frameworks. Finally, we’ll address the critical dimensions of safety, alignment, and regulatory oversight required to operationalize agentic AI responsibly in financial ecosystems. Participants will gain a systems-level understanding of how to engineer intent into AI, design autonomous yet trustworthy financial agents, and prepare for a future where decision-making is increasingly shared between humans and intelligent systems. --------------------------------------------------------------- By registering for this event, you agree that IEEE and the organizers are not liable to you for any loss, damage, injury, or any incidental, indirect, special, consequential, or economic loss or damage (including loss of opportunity, exemplary or punitive damages). The event will be recorded and will be made available for public viewing. Speaker(s): Dhivya Nagasubramanian Virtual: https://events.vtools.ieee.org/m/508173
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Abstract: Advances in soft materials, low-power circuits, and wireless energy harvesting now allow imperceptible, long-lived bioelectronic systems that are practical beyond the lab bench. This talk presents translational pathways for multimodal bioelectronics that bridge engineering innovation with clinical impact. We highlight epidermal and implantable platforms that acquire high-fidelity biosignals—EEG/IMU for neonatal seizure risk and sleep, ECG–SCG–PCG for cardiopulmonary coordination, and oral ISFET-based pH sensors for chemo- physiological context—and describe the materials, packaging, and system architectures that enable stable, week-scale wear. Beyond device physics, we emphasize translation: firmware that guarantees sub-10 ms synchronization across channels, analytics pipelines that integrate signal quality indices with explainable ML models, and HIPAA-compliant clinician dashboards that transform continuous raw streams into actionable insights. Case studies from NICU deployments and adult cohorts illustrate how biosymbiotic devices can support seizure detection, brain–heart dysregulation screening, and personalized therapy planning. By uniting materials, systems, and AI with real clinical use, these efforts outline a roadmap for multimodal digital healthcare that is both technically rigorous and translatable to patient care. References: PNAS June 2025 122 (23) e2501220122; Nature Medicine (under review); Nature BME (under submission) [] Speaker(s): Assist. Prof. Yayun Du Agenda: 6:50 - 7 PM: Registration 7-8 PM: Talk and Q&A Virtual: https://events.vtools.ieee.org/m/515108 |
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[]This symposium will focus on quantified reliability, accelerated testing and probabilistic assessments of the useful lifetime of electronic, photonic, MEMS and MOEMS materials, assemblies, packages and systems in electronics and photonics packaging. This includes failure modes, mechanisms, testing schemes, accelerated testing, stress levels, and environmental stresses. Registration is now open. Visit our website for details, for our Advance Program, and to register. https://attend.ieee.org/repp. Milpitas, California, United States, Virtual: https://events.vtools.ieee.org/m/495693
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The power industry is under pressure to rapidly expand infrastructure to meet growing demands from both consumers and producers. But sticking to traditional design and construction methods may no longer be enough. One of the biggest bottlenecks? Hardware dependencies—like waiting on control wiring or specific components—that delay commissioning and inflate project timelines. This presentation explores how embracing IEC 61850, a globally recognized standard for power system communication and configuration, can unlock new efficiencies. By shifting more functionality into software and adopting a standardized, vendor-neutral approach, engineers can accelerate deployment, improve system quality, and simplify integration. We will demystify the IEC 61850 data model and show how it builds intuitive, scalable protection and control systems. You will learn how it reduces vendor lock-in, streamlines troubleshooting, and supports a more agile design process. Real-world case studies will highlight successful implementations, and we will share a practical roadmap to help you begin your journey toward a fully digitized power system. Speaker(s): Darren De Ronde, Agenda: No-host social at 5:30pm Presentation at 6:00pm Dinner at 7:00pm Presentation continues at 7:45pm Adjourn by 8:30pm Zio Fraedo’s, 611 Gregory Lane, Pleasant Hill, California, United States, 94523 |
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