Events

We are thrilled to host LLNL’s 30th Center for Advanced Signal and Image Sciences (CASIS) workshop. The workshop returns with a full 2-day in-person schedule on Wednesday and Thursday, June 24-25, 2026. We encourage a broad range of technical topics at the workshop and being non-archival apart from original work, we are also considering intermediate results from ongoing efforts as well as recently published publications for presentation as a talk and/or a poster. The goal of the workshop is to provide a platform for the exchange of ideas and network with peers across disciplines to foster collaboration and build community. Please submit your abstract by Friday, May 15, 2026. Authors will be notified of the review decisions one week later on May 22, 2026. Apart from the regular presentation track we will feature parallel tutorials, hands-on mini workshops and a dedicated student track to introduce career opportunities at LLNL. The workshop will be held in-person at the (https://uclcc.org/) and requires pre-registration until June 18, 2026. As this is a 2-day whole-day workshop, we will provide coffee and snacks in morning and afternoon breaks as well as a lunch on both days. As this is our 30th anniversary, we will also host a Happy Hour following the regular program on Wednesday, June 24, 2026. (https://engineering.llnl.gov/centers/casis/workshops) This year’s workshop features presentations in the following tracks, moderated by the Program Chairs: - AI/Machine Learning (PhanNguyen, Kowshik Thopalli) - National Ignition Facility (Eugene Kur, Christopher Miller) - Non-Destructive Evaluation (Seemeen Karimi, Harry Martz) - Quantum Sensing & Quantum Computing (Kristi Beck) - Remote Sensing, Non-Invasive Imaging & Inverse Problems (Sean Lehman, Viacheslav Li) - Robotics & Automation (Aldair Gongora, Abhik Sarkar) - Student Track: All topics (Poster only) (Ted Bauman, Min Priest) Become part of this great experience and submit your talk proposal at https://engineering.llnl.gov/centers/casis/workshops before May 15, 2025! Check out (https://www.llnl.gov/article/53041/annual-workshop-brings-together-signal-image-science-community) for last year’s amazing event to see what to expect! The no-fee CASIS Workshop is sponsored by the (https://engineering.llnl.gov/) and held at the (https://uclcc.org/). It is organized by the (https://engineering.llnl.gov/centers/casis), and is a joint meeting with the local chapters of the (https://www.ewh.ieee.org/r6/oeb/SigProc/sigproc.html) and (https://r6.ieee.org/sfoeb-cs/). supported by the (https://r6.ieee.org/oeb/). Co-sponsored by: Lawrence Livermore National Laboratory - Center for Advanced Signal and Image Sciences Bldg: Building 661 L-794, University of California Livermore Collaboration Center, 7000 East Ave, Livermore, California, United States, 94550

In this talk, I will talk about some hardware/software work my group has done in the area of stochastic computing-based machine learning acceleration. Stochastic computing or SC is an approximate, stream-based computing paradigm enabling extremely area-efficient implementations of basic arithmetic operations such as multiplication and addition. I will talk about the suitability of the SC to the machine learning/event processing workloads, how to deal with its inherent approximate nature and briefly discuss few chip prototypes that leverage both logic and in-memory implementations of SC-based accelerators for dense as well as a sparse compute. Speaker(s): Puneet Gupta, Virtual: https://events.vtools.ieee.org/m/561732

Power electronics is a foundational technology that drives a wide range of important and emerging applications including cloud computing, wireless communications, robotics, and smart energy systems. By systematically managing the increased complexity in materials, circuits, and systems, new opportunities are created to greatly advance the functionality and performance of power electronics systems. This speech provides a few examples to illustrate the potential of managed complexity in power electronics design. These include: 1) modular and scalable architecture for systematically managed complexity in high performance circuits; 2) artificial intelligence and machine learning for systematically managed complexity in passive component modeling. This managed complexity approach addresses key challenges in emerging applications by overcoming traditional design barriers from new angles and redefining how power electronics are conceived and implemented in complex systems. Speaker(s): Minjie Chen Murata Electronics North America, Inc., 1732 North First Street #500, San Jose, California, United States, 95112

As emerging technologies such as artificial intelligence, autonomous systems, and large-scale digital platforms become increasingly integrated into society, the need for responsible technology governance has never been greater. This educational session introduces participants to the DIITA Principles (IEEE Standards Association Industry Connections Program), a human- and planet-centered approach to guiding the design, deployment, and oversight of technology in an era of rapid innovation. Through an accessible exploration of governance, ethics, sustainability, transparency, and accountability, attendees will examine how technological decisions can create lasting impacts on individuals, communities, institutions, and the environment. The session highlights the importance of aligning innovation with broader societal goals, including long-term human well-being, environmental stewardship, and sustainable development. Drawing on real-world examples from AI, digital transformation, and emerging technologies, participants will gain insights into the DIITA Principles and their role in promoting responsible technology governance. The discussion will examine how these principles can help align innovation with human values, environmental sustainability, and long-term societal resilience. Participants will also explore how the DIITA Principles can provide a common framework for collaboration among technologists, policymakers, researchers, educators, and industry leaders working toward human and planetary flourishing. Designed for engineers, technology professionals, students, and decision-makers, this educational program aims to raise awareness of the critical role governance plays in shaping technology that not only advances innovation but also contributes to a more sustainable, equitable, and flourishing future for both humanity and the planet. Event Link: Learning Responsible Technology Governance: Insights from DIITA Principles Friday, June 26 · 10:00 – 11:00am Time zone: America/Los_Angeles Google Meet joining info Video call link: https://meet.google.com/msp-ckde-jku Or dial: ‪(US) +1 352-612-0360‬ PIN: ‪759 341 055‬# More phone numbers: https://tel.meet/msp-ckde-jku?pin=5804341574795 Speaker(s): Anuraga Prasanna Mandaleeka Agenda: Topics covered: - Introduction of speaker - Introduction of topic - Describe the core concepts and principles of DIITA - Analyze the societal, ethical, and environmental impacts of technological innovation - Identify opportunities to apply DIITA Principles in practice - Q&A Virtual: https://events.vtools.ieee.org/m/564197

Audio compression is often proposed to improve the efficiency of multimodal large language models, but its impact on downstream task performance remains underexplored. This talk examines how semantic neural audio codecs behave under token reduction constraints, using cross-modal attention as a signal to discard frames with low semantic content. On audio question-answering benchmarks, attention-guided frame selection removes 10–30% of frames while matching baseline accuracy and answer consistency, and identifies a critical compression threshold (keep ratio ~0.7) below which performance degrades sharply. The talk also discusses an "answer consistency paradox" where models remain highly self-consistent (>98%) even as accuracy degrades and what this decoupling of consistency from correctness means for evaluating compressed multimodal systems in low-resource deployments. Speaker(s): Prerana Virtual: https://events.vtools.ieee.org/m/563360

[]Microelectronics serve as the structural backbone for both global economic competitiveness and as our national defense strategy and forms the technical foundation for a wide array of applications. These include high-performance computing, artificial intelligence, autonomous systems, communications networks, and integrated sensing ecosystems. Next-generation microelectronic technologies are shifting away from traditional 2D silicon scaling by embracing 3D Heterogeneous Integration (3DHI), which vertically stacks and interconnects diverse materials. This leap enables unprecedented processing power, miniaturization, and energy efficiency crucial for advanced computing, sensing and communication systems. This talk will focus on this grand vision as well as recent advances in the next-generation microelectronics and manufacturing for sensing and communication systems. It will highlight challenges and opportunities for innovations to address traditional physical scaling limits. Speaker(s): Hasan Sharifi, Bldg: WALC 2127, Purdue University, West Lafayette, Indiana, United States, Virtual: https://events.vtools.ieee.org/m/564441

IEEE SCV-OEB SSIT Chapter Meeting From Hangar Deck to AI Lab: How the USS Hornet Built Its Own Private LLM Join us for a Member Technical Meeting on how the USS Hornet Sea, Air & Space Museum built a private large language model using Google’s NotebookLM and 165 curated content sources. Speakers Mark Rowell, CIO of the USS Hornet Sea, Air & Space Museum, and Chuck Myers, Docent and Board Member, will discuss the project’s design, content curation, testing, real-world use cases, and implications for museums, education, and historical preservation. The program will include live demos, a deep dive into Apollo 11 and 12 mission content, and fresh material being loaded in real time. IEEE members and guests are welcome at 6PM Tuesday night at both the USS Hornet Museum in Alameda and Plug and Play Tech Center in Sunnyvale. Speaker(s): Mark Rowell, Chuck Myers Agenda: AGENDA • The full ideation and design story — why a private LLM, why NotebookLM, and what alternatives were considered • How 165 content sources were selected, loaded, and curated — and what that process actually looks like in practice • Testing and validation: how the team stress-tested the model and refined its responses • Real use cases: how docents, educators, and visitors are already using the system • Apollo 11 and Apollo 12 content deep dive — inside historical detail you won't find in a Google search • Live: new space program content being loaded into the model during the session • Open Q&A and discussion — bring your questions Bldg: Pier 3, USS Hornet Sea, Air & Space Museum, Alameda, California, United States, Virtual: https://events.vtools.ieee.org/m/555292

AI That Works for You: Tools, Prompts, Privacy — and How A Warship Taught Itself History Generative AI is everywhere — but using it effectively, safely, and without surrendering your data is a skill most people are still developing. This quarter's OEB LMAG lunch brings together and local Higher Ed leader and a CIO, two seasoned practitioners for a practical, hands-on session on getting real value from AI tools. Roger Doering, Professor of Engineering at Cal State East Bay, leads the main program on leveraging generative AI effectively and safely — covering tools, approaches, prompting strategies, and critical privacy and security considerations. He's joined by Mark Rowell, CIO of the USS Hornet Museum, who adds a fascinating real-world dimension: what happens when you build your own private LLM on a historic warship's institutional knowledge. Live demos included. Bring your questions — and your appetite. Generative AI tools have moved from novelty to necessity — but the gap between casual use and genuinely effective use is wide. For users with concerns about accuracy, privacy, security, and institutional knowledge, the public-cloud nature of most AI tools raises real questions. This session addresses both sides of that challenge. Roger Doering brings academic and professional rigor to the question of how to get the most from generative AI — what works, what doesn't, and how to stay safe while doing it. Mark Rowell then demonstrates what the far end of the privacy spectrum looks like in practice: a fully private LLM, built on Google's NotebookLM, trained on 165 sources of institutional knowledge about one of America's most historic naval vessels. Together, they cover the landscape from everyday AI productivity to purpose-built institutional intelligence — with plenty of time for hands-on exploration, demos, and the kind of frank conversation that only happens over a good lunch. WHAT YOU'LL COVER • Generative AI tools landscape — what's worth your time in 2026 and why • Prompting that actually works — practical approaches and live examples • AI privacy and security — what you're sharing, with whom, and how to protect yourself • Hands-on demos — try it yourself, not just watch it, so bring a laptop • The private LLM case study — how the USS Hornet built a closed, curated AI from 165 institutional sources • Real-world use cases from the Hornet's deployment — docents, educators, researchers, and visitors • Open discussion — bring your own AI questions, frustrations, and experiments Speaker(s): Roger, Mark, Agenda: Order & Serve Lunch: 11-12 Meeting Topic and discussion: 12-2 Bldg: Golf course restaurant, not pro shop, Beeb's Sports Bar and Grill, 915 Club House Drive, Livermore, California, United States, 94550, Virtual: https://events.vtools.ieee.org/m/557251

As artificial intelligence transitions from experimental deployments to mission-critical production infrastructure, organizations face a fundamental shift from model-centric optimization to system-centric engineering. While advances in model architectures and accelerator technologies have driven recent AI breakthroughs, long-term performance, reliability, and sustainability increasingly depend on the interaction between compute, memory, networking, software runtimes, operations, and governance. This talk presents an industry roadmap for building scalable AI systems that move beyond isolated model optimization toward adaptive, software-defined AI platforms. The roadmap explores five interconnected layers—compute, memory and data, interconnect, runtime and operating systems, and operations and governance—and demonstrates how these layers collectively influence throughput, latency, cost, energy efficiency, reliability, and compliance. The discussion introduces workload-aware architectures for inference, retrieval-augmented generation (RAG), agentic workflows, multimodal applications, and edge AI, highlighting the growing importance of memory hierarchies, topology-aware scheduling, adaptive control loops, and cluster-scale orchestration. A practical AI systems maturity model is proposed to help organizations assess current capabilities and prioritize investments, progressing from ad hoc experimentation to autonomous, policy-governed AI fabrics. The presentation concludes with a pragmatic execution framework and industry best practices for achieving predictable service levels, operational resilience, and sustainable AI economics. The central thesis is that future AI leadership will be determined not by model performance alone, but by the ability to design, operate, and govern AI as an integrated systems platform Co-sponsored by: Vishnu S. Pendyala, San Jose State University Speaker(s): Sujit Reddy Thumma Virtual: https://events.vtools.ieee.org/m/563401

[] Co-Sponsored by the Photonics Chapter As silicon photonics and co-packaged optics (CPO) technologies continue to scale for AI, cloud, and high-bandwidth networking applications, reliability qualification methodologies are becoming increasingly critical. While much of the industry focus has been on performance and integration density, standardized approaches for qualification, reliability assessment and long-term service life prediction remain an important industry challenge. This webinar will present the motivation, structure, and key technical considerations behind the emerging JEDEC work that Cisco has led on Silicon Photonics Qualification and Reliability Requirements. The session will discuss reliability expectations and qualification strategies for silicon photonics devices, chiplets, integrated optical assemblies, and heterogeneous integration approaches used in AI and datacenter applications. The webinar is intended for engineers and technologists working in silicon photonics, advanced packaging, NPO, CPO, datacenter infrastructure, reliability engineering, semiconductor manufacturing, and optical module development. Speaker(s): Farnood Rezaie, Virtual: https://events.vtools.ieee.org/m/560599

Paving the AI Superhighway: Where Power Meets Intelligence As part of our 2026 year-round symposium series themed “AI Super-Highway”, this symposium will focus on advanced power technologies for AI era and will be held at Intel SC-12 Auditorium: 3600 Juliette Ln, Santa Clara, CA, 95054, on Saturday, July 18th, 2026, 1:00 PM to 5:00 PM This summer symposium concentrates on the critical power and energy infrastructure that underpins the continued evolution and scaling of artificial intelligence. Particularly, it will explore how the rapid expansion of AI is reshaping the global power landscape. The symposium aims to bring together leading pioneers from industry and academia to discuss key challenges, recent innovations, and future opportunities at the intersection of AI and the power sector. STAY TUNED.. more information to be announced. Room: SC-12 Auditorium, Bldg: Intel , 3600 Juliette Lane, Santa Clara, California, United States