• Power Distribution in Heterogeneous Integrated Packaging for Data Center Computing

    Virtual: https://events.vtools.ieee.org/m/546237

    []Join us for an insightful webinar with Francesco Carobolante, founder of IoTissimo® LLC and an EPS Distinguished Lecturer, as he explores the critical challenges and innovative solutions that advanced packaging can provide to address the "Power Wall". With over 30 years of industry experience and a tenure at Intel’s Corporate Strategy Office, Francesco will delve into the Heterogeneous Integration Roadmap (HIR) perspective on scaling high-power AI processors. This session will analyze how signal BW and energy requirements dictate the options available for architecting the package structure, including Vertical Power Delivery, integrated voltage regulators and advanced thermal management techniques. Discover how these architectural shifts are enabling the next generation of data center performance. Speaker(s): Francesco Carobolante, Virtual: https://events.vtools.ieee.org/m/546237

  • Spring Speaker Series 3

    Stanford, California, United States, 94305

    Continuation of Speaker Series at Stanford IEEE. Stanford, California, United States, 94305

  • Third Annual IEEE Build-Up Substrate Symposium

    SEMI World Headquarters Milpitas, CA, United States

    [] (We anticipate closing registration in late April due to limited facility space; we apologize in advance if we cannot register you.) The 2026 Build-up Substrate Symposium (BUSS) convenes global leaders in semiconductor packaging, substrate technology, and AI-driven systems. Under the theme “Next-Gen Substrates: Accelerating Innovation in the AI Era,” the symposium explores how advanced substrates are enabling transformative breakthroughs in chiplet integration, heterogeneous systems, and Co-Packaged Optics (CPO). As AI, HPC, and edge computing drive unprecedented performance demands, next-generation substrates are emerging as the foundation for scalable, high-performance, and energy-efficient solutions. Chiplets and CPO are rapidly gaining traction as a critical enabler of high-bandwidth, low-latency interconnects, further elevating the role of substrates in next-gen architectures. BUSS 2026 showcases innovation across the entire ecosystem—from materials to manufacturing and integration —- highlighting how substrate advancements are powering the future of semiconductor technologies, including the convergence of optics and electronics. SEMI World Headquarters, Milpitas, California, United States

  • Third Annual IEEE Build-Up Substrate Symposium

    SEMI World Headquarters Milpitas, CA, United States

    [] (We anticipate closing registration in late April due to limited facility space; we apologize in advance if we cannot register you.) The 2026 Build-up Substrate Symposium (BUSS) convenes global leaders in semiconductor packaging, substrate technology, and AI-driven systems. Under the theme “Next-Gen Substrates: Accelerating Innovation in the AI Era,” the symposium explores how advanced substrates are enabling transformative breakthroughs in chiplet integration, heterogeneous systems, and Co-Packaged Optics (CPO). As AI, HPC, and edge computing drive unprecedented performance demands, next-generation substrates are emerging as the foundation for scalable, high-performance, and energy-efficient solutions. Chiplets and CPO are rapidly gaining traction as a critical enabler of high-bandwidth, low-latency interconnects, further elevating the role of substrates in next-gen architectures. BUSS 2026 showcases innovation across the entire ecosystem—from materials to manufacturing and integration —- highlighting how substrate advancements are powering the future of semiconductor technologies, including the convergence of optics and electronics. SEMI World Headquarters, Milpitas, California, United States