Events

As part of the Stanford IEEE continuing Speaker Series throughout the year. Stanford, California, United States, 94305

2nd Lecture of IEEE CS San Diego's 2026 Invited Seminar Series (Virtual) Co-sponsored by: Media Partner: Open Research Institute (ORI) Speaker(s): Dr. Aniket Roy Agenda: - Invited talk from Dr. Aniket Roy, from NEC Labs America - Q/A Session Virtual: https://events.vtools.ieee.org/m/540255

The San Francisco Bay Area chapter of the IEEE Computer Society invites to our free and open Virtual Tech Talks (no IEEE membership required): Speaker: Dr.K.Venkata Nagendra ((https://www.google.com/url?q=http://www.linkedin.com/in/dr-nagendra-kv-a14056231&sa=D&source=calendar&ust=1771220244320268&usg=AOvVaw1DmULaeXumHuEXaNPagk5d)) Title: Emotional Intelligence in AI Abstract: AI emotional intelligence, also known as emotion AI or affective computing, is the ability of AI to detect, interpret, and simulate human emotions using through facial expressions, body language, voice tone and other cues. While AI can analyze emotional cues and even generate responses that seem empathetic, it lacks true consciousness, empathy, and personal experience, which are fundamental to genuine emotional intelligence. Instead of replacing human emotional intelligence, AI serves as a tool that can enhance it by providing insights, analyzing data at scale, and creating more natural human-machine interactions. AI technology uses various methods to recognize and respond to human emotions, including: Facial Recognition Technology is used to analyze facial expressions and detect emotions such as happiness, sadness, anger, and fear. This technology uses algorithms to analyze facial features such as the shape of the mouth, eyes, and eyebrows. And another one, Voice Recognition Technology is used to analyze the tone and pitch of a person's voice to detect emotions such as happiness, sadness, and anger. This technology uses machine learning algorithms to analyze speech patterns and identify emotional cues. The Benefits of Emotional Intelligence in AI, Creating More Meaningful Interactions between Humans and Machines, Enhanced education, shaping the Future of AI. Bio: Dr. Kolluru Venkata Nagendra, graduated from Sri Venkateswara University in Tirupathi with a bachelor's degree in computer science. He later graduated from Jawaharlal Nehru Technological University in Hyderabad with a master's degree in computer applications. After that, he graduated from Acharya Nagarjuna University in Guntur with a Master of Technology in Computer Science and Engineering. Additionally, he graduated from Vikrama Simhapuri University in Nellore, Andhra Pradesh, with a Ph.D. in computer science. He graduated from Srinivasa University in Mangalore with a PDF (Post Doctoral Fellowship) in CSE. In addition to writing numerous computer science textbooks, Dr. Nagendra is the author of more than 70 research papers that have been published in journals with UGC and Scopus indexes. He served as a judge and reviewer for numerous conferences and journals. Having worked at several engineering colleges for more than 17 years, he is currently employed SRKR Engineering College, Bhimavaram, Andhra Pradesh. His research interests encompass Machine Learning, Deep Learning, and Data Mining. Speaker(s): Dr. K.Venkata Nagendra Virtual: https://events.vtools.ieee.org/m/538538

Greetings and welcome to our annual IEEE San Francisco Bay Area Consumer Technology Society (CTSoc) event, bringing a comprehensive summary of latest and most innovative technologies unveiled at the 2026 Consumer Electronics Show (CES) in Las Vegas. CES has long been the world's premier showcase for consumer technology, and its scope continues to expand well beyond traditional consumer electronics across a diverse range of categories—from wearables and smart home ecosystems to autonomous robotics, commercial and recreational drones, cutting-edge medical and healthcare devices, automotive technology, sustainable energy and accessibility innovations, that are reshaping how we live, work, and interact with the world around us. Please join us as our expert speakers distill the most significant trends and breakthrough technologies from the show. Speakers: Tom Coughlin: President, Coughlin Associates 2024 IEEE President & IEEE Fellow, Tom is a world-renowned digital storage expert and industry analyst. Having served as the global leader of IEEE, he brings unparalleled insight into the hardware and infrastructure driving the latest consumer trends. Avery Lu: Partner & Head of Business Development, Aventurine Capital Group 2025-2026 Chair of the IEEE Santa Clara Valley Section, Avery is a seasoned venture capitalist and deep-tech executive. His expertise in semiconductors and AI allows him to identify the startups and technologies with the highest potential for commercial success and market disruption. This will be a hybrid event (in-person and online). Register early, do not miss this event to get a glance into the future of consumer technologies. In-Person joining locations - Plug and Play Tech Center, Sunnyvale, San Francisco Room 440 N. Wolfe Road, Suite 71, Sunnyvale, California, United States 94085 Online Webex joining links - https://ieeemeetings.webex.com/ieeemeetings/j.php?MTID=mc80980714596e97a1dd28469dd72f589 Meeting number:2534 876 5158 Join from a video system or application Dial 25348765158@ieeemeetings.webex.com You can also dial 173.243.2.68 and enter your meeting number. To dial from an IEEE Video Conference System: *1 2534 876 5158 Tap to join from a mobile device (attendees only) +1-415-655-0002,,25348765158## United States Toll 1-855-282-6330,,25348765158## United States Toll Free Event Day Logistics 'When guests arrive, please park in the back of the building and enter through the back door. Once inside the building, proceed to the Front Desk. From the Front Desk, walk up the stairs or take the elevators to the 2nd Floor. Once on the 2nd Floor, please follow the signs leading to the San Francisco Room.' Submit your Questions https://form.typeform.com/to/NnBZ2CRN Agenda: 5:30 – 6:00 pm: Check-in, networking, food and drinks 6:00 - 7:30 pm: Presentations by Tom Coughlin and Avery Lu 7:30 - 8:00 pm: Q&A and Networking 440 N. Wolfe Road, Suite 71, , Sunnyvale,, California, United States, 94085, Virtual: https://events.vtools.ieee.org/m/536441

(https://r6.ieee.org/scv-tems/) is co-hosting the 2026 CES Download Event. Join us on March 5, 2026, for a Hybrid presentation. Come for a glimpse into the latest and most innovative technologies unveiled at the recent Consumer Electronics Show in Las Vegas. This is the annual IEEE (https://site.ieee.org/scv-ces/) event providing a comprehensive summary of the latest and unique tech innovations from the January 2026 Consumer Electronics Show (CES). This annual CES Download event has proven to be very popular, as many people working in related industries do not get to attend CES in Las Vegas. Presenters: Tom Coughlin and Avery Lu For details, online attendance info, and registration: https://events.vtools.ieee.org/m/536441 Plug and Play Tech Center, 440 N Wolfe Road, Sunnyvale, California, United States, 94085, Virtual: https://events.vtools.ieee.org/m/543570

PLEASE NOTE THAT THIS IS FOR CHAPTER OFFICERS OF SANTA CLARA VALLEY SECTION, SAN FRANCISCO SECTION AND OAKLAND-EAST BAY SECTION ONLY Greetings! This year's officer training is being conducted for officers of San Francisco Bay Area Council at the Plug and Play Tech Center in San Jose, CA. This is meant to provide the Chapter officers with training related to the different aspects of the chapter operations. Below are some of the topics that will be covered in the training: 1. vTools 2. Concur Expense 3. Nextgen banking and reporting 4. Senior member elevation program 5. How to run an effective chapter 6. Web presence More detailed agenda will be shared soon along with presenter details. Please register using the link and save the date for the officer training. Room: 2nd floor, Silicon Valley Room, Bldg: Plug and Play Tech Center, 440 N Wolfe Rd, Sunnyvale, California, United States, 94085

This is a hybrid in-person and online event. Pre-registration is required for either. In 1984, the Field Programmable Gate Array (FPGA) was invented at Silicon Valley startup Xilinx by its co-founder Ross Freeman. It was not an obviously good technology as it had serious drawbacks in speed, cost, power, and capacity. However, its novel design transformed the technology industry as it rode the wave of Moore’s Law. As this transformation was not a straight road, companies that did not recognize fundamental industry changes created by the FPGA fell by the wayside. If companies did not stretch to find new uses for this technology, or did not deploy its resources in building a new ecosystem, they also failed. Xilinx’s FPGA invention led to the major industry transformation of the Fabless semiconductor model, and step-by-step Xilinx navigated this field of potential failure. These steps tell of a company growing from a hyper-lean adrenaline-driven startup to a multi-billion-dollar success story. Not every step was correct, and certainly there was some luck. However, considerable effort was required to achieve that luck, and even more effort to capitalize on it. In this talk, IEEE Fellow Steve Trimberger will discuss change: the changing value of semiconductor scaling, the changing needs of EDA, the changing barriers to entry, the changing application of the technology, and the changing role of consultants and corporate relationships over the course of many years. These changes got us to 2026 – what change is next? Please note that an IEEE Milestone for the FPGA will be dedicated on Thu, March 12. Information about attending its dedication online will be available soon. Speaker(s): Dr. Steve Trimberger, 925 Thompson Place, Sunnyvale, California, United States, 94085, Virtual: https://events.vtools.ieee.org/m/534657

Ian Walker of GMW Associates will review the development of projected-field electromagnets for device testing. Speaker(s): Ian, Agenda: 6:30 – 7:00 Socializing and Networking at Quadrant 6:55 Zoom session will be online with Waiting Room 7:00 – 7:45 Lecture begins, online and in person 7:45 – 8:00 Questions and Answers 1120 Ringwood Ct., San Jose, California, United States, 95131, Virtual: https://events.vtools.ieee.org/m/535158

Celebrate International Women's Day 2026 with our virtual panel "Give to Gain: Investing in Women to Strengthen Leadership and Innovation." This engaging international dialogue brings together leaders from higher education, engineering, and IEEE WIE to explore how investing in women creates stronger leadership pipelines and accelerates innovation in STEM and beyond. Virtual: https://events.vtools.ieee.org/m/543770

[]Students and aspiring engineers are invited to attend a controls information session hosted by Nor-Cal Controls Energy Solutions a California-based control systems integrator specializing in SCADA and energy management solutions for utility-scale solar and battery energy storage projects. This event will introduce attendees to the fundamentals of control systems engineering as well as career paths within the field. Representatives from the company will provide insight into current industry trends, share real-world project experiences, and discuss opportunities. The session offers a valuable opportunity for participants to expand their understanding of the controls field while connecting directly with industry professionals. Room: 1217, Bldg: TEB, Sacramento State University, Sacramento, California, United States, Virtual: https://events.vtools.ieee.org/m/544199

[] Are you interested in power systems? Come join IEEE in collaboration with Eaton Corporation for an info session. Our speaker, Philip Delosreyes, a CSUS Alumni and Licensed Professional Engineer, will provide an overview on Short Circuit Analysis and its application with electrical equipment. 📅 03/16 ⏰ 12:00 - 1:00 PM 📍 SQU 456 🍕Food Provided! We hope to see you there! Speaker(s): Philip Delosreyes, Room: 456, Bldg: Sequoia Hall, 6012 Jed Smith Dr, Sacramento, CA 95819, Sacramento, California, United States, Virtual: https://events.vtools.ieee.org/m/546592

Join us for a talk on how SmartNICs and RDMA Power AI in the Cloud, check out an Embodied AI demo and get insights into the state of the Chapter. Training modern Large Language Models (LLMs) requires tens of thousands of GPUs acting as a single "AI Supercomputer." To build this "AI Hypercomputer," we must first address the CPU bottlenecks of traditional general-purpose networking. This talk begins by analyzing why standard TCP/IP processing limits Model Training performance and introduces the concept of "Kernel Bypass" and the role of SmartNICs in offloading network processing from the host CPU. We will explore why modern AI clusters have moved toward hardware offloads (like RDMA) to achieve the high throughput and low latency required for GPU-to-GPU communication. We will also discuss the specific challenges of running lossless transport protocols over lossy Ethernet, where congestion and packet drops can cause severe performance degradation ("tail latency") in large-scale training jobs. The session concludes by analyzing the architectural design patterns required to optimize flow control and ensure reliable delivery in massive AI infrastructure environments. Demo: Comparing Reinforcement Learning with Imitation Learning for Autonomous Warehouse Pick-and-Place using a Robotic Arm This demo simulates a last-meter warehouse picking task, inspired by Amazon/Kiva-style systems but using general-purpose robotics. The experiments explicitly contrast policy-gradient reinforcement learning methods such as PPO with imitation learning inside a physically realistic embodied-AI task built with Isaac Sim. The demo has been designed to expose where each algorithm struggles or excels due to action spaces, partial observability, contact dynamics, and reward structure. These are core issues in embodied AI. This event features a leading industry expert from Google addressing this important topic, followed by a demo on Embodied AI using Isaac Sim / Lab updates on the state of our chapter from the IEEE CIS SCV Chair. 🎤 Talk 1 The Infrastructure of AI: How SmartNICs and RDMA Power the Cloud Speaker: Sujithra Periasamy, Google 🎤 Demo and Talk Comparing Model-Free RL Algorithms for Autonomous Warehouse Pick-and-Place with Mobile Manipulation Speakers: Mayank Kapadia and Dr. Vishnu S. Pendyala, Department of Applied Data Science, College of Information, Data, and Society, San Jose State University 🎤 Talk 2 State of the Chapter Speaker: Dr. Vishnu S. Pendyala, Chair, IEEE CIS Santa Clara Valley Chapter Co-sponsored by: Vishnu S. Pendyala, San Jose State University Speaker(s): Sujithra Periasamy, Dr. Vishnu S Pendyala Room: MLK Room 225, Dr. Martin Luther King, Jr. Library (SJSU), 150 E San Fernando St San Jose, California 95112, San Jose, California, United States, Virtual: https://events.vtools.ieee.org/m/537154

Silicon Metasurfaces for DNA Synthesis Abstract: Ready access to long, accurate, and diverse synthetic DNA is essential for the rapid growth of synthetic biology — a field that genetically programs living cells with new functions. Modern microarray-based DNA synthesizers can generate diverse pools of oligonucleotide (single stranded DNA) sequences in parallel. However, each sequence is produced in limited quantity, and their yields decline with increasing oligo length due to cumulative synthesis errors. These limitations complicate downstream sequence segregation and gene assembly. Attempts to address these challenges by enlarging and spacing synthesis sites farther apart reduce the total number of sequences that can be generated simultaneously, thereby compromising synthesis diversity. [] In this talk, I will introduce B-MOS (Metasurface Oligonucleotide Synthesizer for Engineered Biology) — a novel platform that integrates silicon nanophotonics with solid-phase DNA synthesis to overcome these challenges. B-MOS employs dielectric metasurfaces composed of arrays of high-index and low loss silicon nanoantennas (metasurfaces) patterned on glass as optically programmable synthesis sites. The unique optical signature of each metasurface — its spectral and polarization response — is lithographically encoded into the geometry and orientation of the silicon nanoantennas. Under global illumination, only the metasurface tuned to the wavelength and polarization of the laser absorbs the optical energy and transduces it into highly localized heat to site-selectively activate the synthesis reactions. Tuning the laser enables switching between the synthesis sites without moving parts or complex optical projection systems that lead to alignment errors. As these nanostructures support sharp (high-Q) optical resonances, crosstalk between the synthesis sites is minimized. These sharp resonances allow the dense spectral packing of independently addressable synthesis within the tunable range of the laser, thereby maximizing synthesis diversity. Using temperature as a programmable biochemical control knob, I will demonstrate site-selective enzymatic incorporation of fluorescent nucleotides onto surface-bound DNA using the enzyme terminal deoxynucleotidyl transferase. I will further discuss how integrating B-MOS with microfluidics can enable post-synthesis site-selective amplification and spatial segregation of oligo strands for reliable gene assembly. Finally, I will outline how B-MOS can be extended to RNA and peptide synthesis as well as other enzyme-driven processes. By resonant nanophotonics with programmable biochemical control, B-MOS establishes a scalable physical foundation for high-precision biomolecular manufacturing and next-generation molecular technologies. Speaker: Dr. Punnag Padhy Postdoctoral Scholar Department of Materials Science and Engineering Stanford University AGENDA: Thursday March 19, 2026 11:30 AM: Networking, Pizza & Drinks Noon -- 1 pm: Seminar Please register on Eventbrite before 9:30 AM on Thursday March 19, 2026 $4 IEEE members $6 non IEEE members (discounts for unemployed and students ) Bldg: ==> Use corner entrance: Kifer Road / San Lucar Court ==> Do not enter at main entrance on Kifer Road, EAG Labs, 810 Kifer Road, Sunnyvale, California, California, United States, 95051

Stationary generator sets operated in regions governed by a local environmental review board may be subject to strict emissions regulations. Many of these areas, known as non-attainment zones, have enacted clean air requirements that adhere to the EPA’s Tier 4 standard, effective in 2015. For these stringent applications, Cummins provides Tier 4 gensets that reduce the exhaust constituents to the industry’s lowest emissions standard. This presentation will offer insights on how to design a reliable system that meets local and national code requirements. Speaker(s): Shen Yoon, Agenda: No-host social at 5:30pm Presentation at 6:00pm Dinner at 7:00pm Presentation continues at 7:45pm Adjourn by 8:30pm Zio Fraedo's , 611 Gregory Lane, Pleasant Hill, California, United States, 94523

Overview Webinar EDS SCV/SF event, Topic: "A device to circuit framework for BTI, HCD aging ", Presenter: Dr. Souvik Mahapatra "A device to circuit framework for BTI, HCD aging" Lecture by Dr. Souvik Mahapatra The Electron Devices Society Santa Clara Valley/San Francisco joint Chapter and Device Reliability Physics committee are hosting Dr. Souvik Mahapatra. When: Friday, March 20th, 2026 – 11:45AM to 1:15PM (PDT) 11:45AM - 12PM: Introduction 12PM-12:45PM: Lecture 12:45PM-12:55PM: Q&A 1PM Adjourn Where: Zoom Zoom Join Zoom Meeting: https://us06web.zoom.us/j/86948608699?pwd=sDcIAavzNqtsSSpFw4T46sb9f331od.1 Meeting ID: 869 4860 8699 Passcode: 506028 — One tap mobile +16694449171,,86948608699#,,,,*506028# US +12532158782,,86948608699#,,,,*506028# US (Tacoma) Join instructions https://us06web.zoom.us/meetings/86948608699/invitations?signature=u7Zd4xYAj-EoKdgIHXfc2f3mSFDMZ6U2UJrR7D8OKN8 Contact: ieeescveds at gmail.com Speaker: Dr. Souvik Mahapatra Abstract: The benefit of performance gain per power is shrinking at advanced technology nodes. Several factors are responsible for this - including increased thermals, parasitics and aging issues. The traditional approach of treating aging as an afterthought with blanket guardbanding requires careful attention. In this talk we will propose a physics based device aging framework and its implementation in a circuit aging simulation platform. The framework can handle circuit aging under actual mission profiles (input activity and turbo-throttle conditions). Several possible approaches towards realistic / functional input based aging aware design modifications will be explored. Virtual: https://events.vtools.ieee.org/m/546751