Events

3rd Lecture of IEEE CS San Diego's 2026 Invited Seminar Series (Virtual) Co-sponsored by: Media Partner: Open Research Institute (ORI) Speaker(s): Amit Kumar Agenda: - Invited talk from Amit Kumar Padhy - Q/A Session Virtual: https://events.vtools.ieee.org/m/546413

The San Francisco Bay Area chapter of the IEEE Computer Society invites to our free and open Virtual Tech Talks (no IEEE membership required): Eventpage: https://www.eventbrite.com/e/transforming-enterprise-quality-engineering-practices-tickets-1985250279026?aff=oddtdtcreator Speaker: Jyotheeswara Reddy Gottam ((https://www.google.com/url?q=https://www.linkedin.com/in/gjreddy/&sa=D&source=calendar&ust=1774063921225418&usg=AOvVaw3p1OTEbWpnyMYwpkfkEjs-)) Title: The Triple Threat: Transforming enterprise quality engineering practices with Generative AI, Predictive Analytics, and Self-Healing Automation Abstract: Modern software teams face mounting pressure to release high-quality applications faster while managing increasing system complexity and continuous delivery expectations within modern CI/CD pipelines. Traditional testing approaches often struggle to keep pace with rapid code changes, expanding regression suites, and the rising cost of maintaining automation frameworks. These challenges frequently lead to delayed releases, increased testing costs, and defects escaping into production. This presentation explores how the “Triple Threat” of AI-driven testing technologies—generative AI for test script creation, machine learning–based predictive defect analytics, and self-healing automation frameworks—is transforming enterprise quality engineering practices. First, generative AI accelerates test development by automatically generating test cases, scripts, and data from requirements, user stories, or code changes, significantly reducing manual scripting effort. Second, predictive defect analytics powered by machine learning analyzes historical defect patterns, code churn, and previous test outcomes to identify high-risk components and prioritize testing efforts where failures are most likely to occur. Third, self-healing automation frameworks intelligently adapt to UI or API changes, minimizing brittle test failures and reducing the costly maintenance typically associated with large automated test suites. When deployed together, these technologies reinforce one another: generative AI expands test coverage, predictive analytics focuses testing on the most critical risk areas, and self-healing automation ensures test suites remain resilient despite frequent application updates. Applied across API testing, functional testing, integration testing, and end-to-end testing, this integrated approach enables organizations to modernize their testing strategy while improving reliability. The combined impact allows enterprises to reduce testing costs by up to 40%, accelerate release cycles by 30%, and improve defect detection rates by over 50%, demonstrating how AI-driven testing can deliver measurable improvements in both quality and delivery speed across enterprise software systems. Bio: Jyotheeswara Reddy Gottam is a Software Engineering Leader with over a decade of experience in the retail and e-commerce industry. Currently a Senior Software Engineer at Walmart Global Tech, he leads end-to-end testing strategies for high-traffic marketplace platforms, driving scalability, reliability, and performance for systems handling millions of daily transactions. He specializes in Gen AI, ML, AI agents, RAG, test automation, performance engineering, and CI/CD enablement. Throughout his career, he has architected scalable automation frameworks, reduced regression cycles significantly, improved release velocity, and ensured platform stability during peak traffic events. He has also led cross-functional initiatives across payments, inventory, personalization, and mobile platforms. Speaker(s): Jyotheeswara Reddy Gottam Virtual: https://events.vtools.ieee.org/m/548913

Chiplet and disaggregated architectures are rapidly becoming mainstream across applications from edge to server. Yet the resulting design complexity exceeds the capabilities of today’s tools, flows, and methodologies—particularly when aiming for highly optimized solutions at scale. Augmented Intelligence, the combination of human expertise and machine intelligence, offers a transformative approach to this challenge. By assigning strategic, high-level decision-making to engineers and delegating computationally intensive, iterative tasks to AI, this framework enables multi-level and multi-domain optimization. The result is the ability to generate a far greater number of custom-optimized designs with the same resources—delivering competitive products with higher quality and faster time-to-market. At Intel, in collaboration with partners, we have developed and deployed Augmented Intelligence solutions spanning silicon to system design and hardware to software design. These efforts have demonstrated efficiency gains exceeding 90% in critical areas. In this talk, I will share practical examples and key insights from several years of applying Augmented Intelligence to end-to-end design, highlighting how human–AI collaboration is reshaping the path to innovation. There will not be any recording. Please attend in person. Speaker(s): Olena Zhu, Agenda: 5:30-6:15pm: Light Dinner/Social 6:15: Chapter Admin and then Presentation Room: Conf SJ5-1 Lake Tahoe, Bldg: Building 5, 2655 Seely Ave, Cadence campus, san jose, California, United States, 95134

Synopsis: Please feel free to check out the work and thoughts of Prof. Ethem Alpaydın, Ph.D., https://mitpress.mit.edu/author/ethem-alpaydn-10375/ on Google Scholar at https://scholar.google.com/citations?user=lXYKgiYAAAAJ&hl=tr and generally on the Internet. Then, please feel free to submit your questions to Prof. Ethem Alpaydın - via Twitter by using the hashtag #ProfAlpaydinAMA and tagging @vishnupendyala - emailing vspendyala(at)hotmail(dot)com with #ProfAlpaydinAMA in the subject Selected questions will be answered by Prof. Alpaydin during the session. The audience may be able to ask follow-up questions during the session, using the Chat feature. --------------------------------------------------------------- By registering for this event, you agree that IEEE and the organizers are not liable to you for any loss, damage, injury, or any incidental, indirect, special, consequential, or economic loss or damage (including loss of opportunity, exemplary or punitive damages). The event will be recorded and will be made available for public viewing. Co-sponsored by: Vishnu S. Pendyala, SJSU Speaker(s): Dr. Vishnu S. Pendyala, Prof. Alpaydın Virtual: https://events.vtools.ieee.org/m/537179

Pierre-Olivier Jubert of Western Digital will review the design and characterization of media used in heat-assisted magnetic recording (HAMR). Speaker(s): Pierre-Olivier, Agenda: 6:30 – 7:00 Socializing and Networking at Quadrant 6:55 Zoom session will be online with Waiting Room 7:00 – 7:45 Lecture begins, online and in person 7:45 – 8:00 Questions and Answers Quadrant Corp., 1120 Ringwood Ct., San Jose, California, United States, 95131, Virtual: https://events.vtools.ieee.org/m/544920

Quantum Computers are expensive to build, take time to run, and are prone to noise and faults which reduce qubit reliability. Quantum software programmers can benefit from ways to validate whether or not quantum programs behave as expected without running or simulating a full program. This talk will present the Quantum State Preparation Program Validation Framework (QSV), a framework that uses property-based testing to validate whether or not quantum programs meet user-specified properties. Speaker(s): Anshu Sharma, Room: 401-F Conference Room, Bldg: Martin Luther King Jr. Memorial Library, 901 G St NW, Washington, DC, District of Columbia, United States, 20001, Virtual: https://events.vtools.ieee.org/m/545578

April 7 6PM-7:30PM Member Techical Meeting at Santa Clara University - with Pizza: This meeting will explore the Future of Work with speakers who will address the technical and business workforce environment given the changes that have transpired with the increasing use of generative and agentic AI. Our speakers include Claudionor Coelho, Chief AI Officer at Majestic Labs ai as well as a to be named leader in AI business process applications. The format will include conversation over pizza and formal speakers from 6:45-7:15, concluding with open disucssion. Agenda: AGENDA - Various types of Pizza and drinks will be served - Introductions - Panel The Future of Work: Claudionor Coelho, Cheif AI officer at Zscaler - Open Discussion Room: 2116, Bldg: Sobrato Campus for Discovery and Innovation (SCDI), Santa Clara University, 500 El Camino Real, Santa Clara, California, United States, 95050, Virtual: https://events.vtools.ieee.org/m/547984

In this presentation, I will present some of the recent progresses in building conversational agents, with a focus on the speech modality. I will introduce desirable properties of such systems and explain some of the key concepts, core ideas, and main technologies developed in practical systems. Speaker(s): , Dong Yu Virtual: https://events.vtools.ieee.org/m/545402

The technology industry is rapidly crossing a critical threshold. We are moving beyond AI as a passive Copilot (a tool that simply advises engineers) and entering the era of AI as an active Agent. These new agents are capable of autonomously diagnosing issues and executing changes directly within global production environments. However, granting AI write-access to mission-critical infrastructure introduces a new class of systemic business risk. Without the right safeguards, autonomous systems can make unpredictable decisions or be manipulated, leading to cascading operational failures. The transition to autonomy requires technology leaders to fundamentally rethink their Site Reliability Engineering (SRE) and security strategies. In this session, the speakers bridge the gap between strategic leadership and architectural rigor. Attendees will receive a comprehensive blueprint for safely managing the transition to AI-operated infrastructure, ensuring their systems remain highly intelligent and fundamentally incorruptible. The Dual-Track Roadmap This session provides a comprehensive framework to navigate the era of Agentic SRE, divided into two distinct tracks: Track 1: The Management Imperative (Strategy) Quantifying the ROI of Autonomy: Learn how to balance the efficiency gains of autonomous systems against operational costs and underlying model risks. Defining Agentic Oversight: Establish the critical cultural and operational boundaries between decisions that require human approval and tasks that can be safely fully automated. Track 2: The Security Blueprint (Architecture) Pioneering the IARA Framework: A high-level overview of the Incorruptible Autonomy Reference Architecture, a 7-pillar security model for safely deploying AI agents. Architecting Trust: Discover how to grant AI systems temporary, just-in-time permissions to prevent unauthorized access and severely limit the blast radius of any potential errors. Speaker(s): Ankush Sharma, Kunal Kannav Room: 108, Bldg: Alameda Hall, Santa Clara University, Santa Clara, California, United States, Virtual: https://events.vtools.ieee.org/m/547313

[]Chiplets have become a compelling approach to scaling and heterogeneous integration e.g. integrating workload-specific processors and massive bandwidth memory systems into computing systems; integrating die from multiple function-optimized process nodes into one product; integrating silicon from multiple businesses into one product. Chiplet-based products have been produced in high volume by multiple companies using proprietary chiplet ecosystems. Recently, the community has proposed several new standards (e.g., UCIe) to facilitate integration and interoperability of any compliant chiplet. Hyperscalers (e.g., Google, Amazon) are actively designing high volume products with chiplets through these open interfaces. Other communities are exploring the end-to-end workflow and tooling to assemble chiplet-based products. High performance computing can benefit from this trend. However, the performance, power, and thermal requirements unique to HPC, present many challenges to realizing a vision for affordable, modular HPC using this new approach. Architectural modeling and simulation will play a critical role in pathfinding for this new potential direction for HPC beyond Exascale. Speaker(s): John Shalf, Agenda: see ‘location’ for WebEx details Virtual: https://events.vtools.ieee.org/m/539463

(NOTE: This event is only open to SJSU students, faculty and staff.) Silicon Valley is commonly acknowledged as the tech capital of the world. How did Silicon Valley come into being, and what can we learn for our own careers? The story goes back to local Hams trying to break RCA's tube patents, Stanford "angel" investors, the sinking of the Titanic, WW II and radar, and the SF Bay Area infrastructure that developed –these factors pretty much determined that the semiconductor and IC industries would be located in the Santa Clara Valley, and that the Valley would remain the world’s innovation center as new technologies emerge –digital, then software, biotech, VR, autonomous vehicles, artificial intelligence, LLMs –and be the model for innovation worldwide. This talk will give an exciting and colorful history of development and innovation that began in Palo Alto in 1909. You'll meet some of the colorful characters –Cyril Elwell, Lee De Forest, Bill Eitel, Charles Litton, Fred Terman, David Packard, Bill Hewlett, Bill Shockley and others –who came to define our worldwide electronics industries through their inventions and process development. You'll understand some of the novel management approaches that have become the hallmarks of its tech startups. In this talk, the key Silicon Valley attributes will be illustrated and analyzed, for consideration by engineers interested in creating their own start-ups and high-tech businesses, working for them, or simply understanding them. Speaker(s): Paul Wesling, San Jose State Unversity, San Jose, California, United States, Virtual: https://events.vtools.ieee.org/m/545434

The talk will explore some of the research projects in the Adaptive Microsystems (AdaMist) lab led by Dr. Cretu, with an emphasis on a common vision and strategy. Polymer-based transducers, fabricated using green, rapid and low-cost processes, have been used for inertial and ultrasonic transducers. MEMS accelerometers with piezoelectric polymers show the promise of novel microfabrication technologies, while photosensitive polymers (SU-8) are the base of a new generation of CMUT (Capacitive Micromachined Ultrasonic Transducer) arrays. Poly-CMUT applications, from custom small probes for biomedical imaging to industrial applications like nondestructive testing and monitoring, open a new world of opportunities. Speaker(s): Edmond Cretu, Virtual: https://events.vtools.ieee.org/m/552485

This is a hybrid in-person and online event. Pre-registration is required for either. Conversational AI systems today speak with remarkable confidence, often giving the impression of understanding and reasoning. However, teams deploying these systems often quickly encounter familiar problems: drift, hallucinations, contradictory answers, and conversations that quietly lose their original purpose. Why do systems that seem so capable end up behaving so unpredictably? In this talk, Elena Gostrer will examine these behaviors from a practical, product-engineering perspective. Rather than exploring model internals, this talk will focus on what actually happens when humans interact with probabilistic language models – and why traditional software assumptions fail in conversational settings. Elena will also discuss what architectural patterns teams are adopting to keep in control, and she’ll highlight why combining generative AI with explicit structure, state, and constraints is becoming essential. Attendees will leave with a clearer understanding of why conversational AI breaks, what helps it behave more reliably, and how to think differently about designing human-AI interactions. Speaker(s): Elena Gostrer, 925 Thompson Place, Sunnyvale, California, United States, 94085, Virtual: https://events.vtools.ieee.org/m/541387

Th[]e transition to 3D heterogeneous integration has fundamentally changed the thermal characterization problem. Buried heat sources, anisotropic thin-film materials, through-silicon vias, and multilayer stacked structures require measurement techniques with sub-micron spatial resolution, depth sensitivity, and a temporal range — capabilities that infrared thermography and Raman spectroscopy cannot reliably deliver at this level of structural complexity. This session presents optical sampling thermoreflectance as a practical, commercially available solution, with real measurement data from a university lab and an industrial FA environment. Virtual: https://events.vtools.ieee.org/m/551389

Continuation of Speaker Series at Stanford IEEE. Stanford, California, United States, 94305

Ontario Power Generation’s Darlington New Nuclear Project (DNNP) is at the forefront of deploying Small Modular Reactor (SMR) technology in Canada, anchored by the GE Vernova Hitachi BWRX-300. As North America’s first commercial, grid-scale SMR, DNNP plans up to four units totaling 1,200 MW. The project introduces advanced safety features, including natural circulation cooling, integral isolation valves, and passive heat removal, while supporting thousands of jobs and boosting Ontario’s economy. A collaboration between OPG, GE Vernova Hitachi, AtkinsRéalis, and Aecon-Kiewit, DNNP strengthens Ontario’s clean energy leadership and sets a model for SMR deployment globally. With construction underway, DNNP will help meet rising electricity demand, advance electrification, and deliver reliable, carbon-free power, showcasing nuclear innovation’s vital role in climate action and economic growth. Speaker: Michael Takla, Ontario Power Generation Event Moderator: Dr. Maike Luiken, PhD, SMIEEE, IEEE-HKN, FEIC, FCAE, is managing director, R&D, at a start-up company, Carbovate Development, and Adjunct Research Professor, Western University, Canada. Speaker(s): Michael Takla, Maike Luiken Agenda: We were given written permission to rebroadcast the Canadian earlier program which will be on April 1 at 9:00am. The SCV Section Life Members Affinity Group program will be at the more convenient time on Apr 15, 2026 at 07:00 PM Pacific Time Virtual: https://events.vtools.ieee.org/m/547687

The state of video compression standards is strong and dynamic, and more compression is coming in their future. To explain why will start by presenting deployment and adoption of the two most recent video compression standards: AV1 and VVC. Will then discusses new deep learning-based video compression technologies that standards development organizations are investigating and exploring for standardization. Will close highlighting some of these investigations that have reached the standardization stage. Speaker(s): , Iole Moccagatta Agenda: 6:15 – 7:00 Registration & Check-in (Free for IEEE members, $5 for non-members collected at door) Networking, food, and drink 7:00 – 8:00 PM – Presentation & Discussions Room: Room 1302, Bldg: Sobrato Campus for Discovery and Innovation (SCDI) , Santa Clara, California, United States, 95053

Join us at Santa Clara University for the APEC 2026 Download Event, hosted by the IEEE PELS San Francisco Bay Area Chapter. This engaging session brings together engineers, researchers, and industry professionals to explore the most impactful moments and innovations presented at the Applied Power Electronics Conference (APEC) 2026. The event will highlight key takeaways from technical sessions, including emerging trends in wide bandgap semiconductors, advances in high-efficiency power conversion, AI-driven design optimization, and next-generation energy systems. Attendees will gain valuable insights into cutting-edge research and real-world applications shaping the future of power electronics. In addition, we will cover standout keynote sessions, offering perspectives from industry leaders on the evolving landscape of power electronics. The program aims to foster knowledge sharing, networking, and discussion within the local power electronics community. Student Highlights: Students are especially encouraged to attend! This is a great opportunity to: - Discover cutting-edge topics that can inspire your coursework, senior projects, or research direction - Learn directly from experts about industry expectations and emerging career paths in power electronics - Network with professionals and local engineers from leading companies in Silicon Valley - Gain exposure to real-world applications beyond the classroom Whether you attended APEC or want a curated overview of its most important developments, this download event is an excellent opportunity to stay informed, get inspired, and expand your professional network. Bldg: Sobrato Campus for Discovery and Innovation, Santa Clara University, 500 El Camino Real, Santa Clara, California, United States, 95053

Reserve this date for a social gathering followed by this presentation. IEEE member fee is subsidized. Before Wi-Fi, smartphones, and streaming, there were spark transmitters, crystal sets, and glowing vacuum tubes. Rachel Lee, the Executive Director of the California Historical Radio Society will discuss the work being done to preserve the technologies and stories that shaped modern electronic communication. This presentation offers a fast-paced visual tour of the CHRS Museum in Alameda. Agenda: Social meeting, presentation, and lunch. Select from buffet or order from menu depending on the number of registrations. Bldg: Golf course restaurant, not pro shop, Beeb's Sports Bar and Grill, 915 Club House Drive, Livermore, California, United States

Join us for an insightful virtual webinar on "The Engineer’s Guide to AI Strategy: Bridging the Gap Between Business and Technical Reality" hosted by the IEEE Women in Engineering Oregon Section AG and co-hosted by Spokane Section, Seattle Section San Francisco section, Santa Clara Valley Section, and San Fernando Valley Section WIE AG where we challenge the traditional boundaries between strategy, governance, and engineering. The rapid rise of Artificial Intelligence has led to countless “Proof of Concepts” that never make it to production—and production systems that fail spectacularly when they do. Why does this happen? A key reason lies in how organizations traditionally separate Strategy and Governance from Engineering execution. Strategy is often treated as a conceptual exercise, while governance is reduced to compliance checklists—leaving engineers disconnected from the very decisions that shape successful AI systems. In this insightful session, we challenge that paradigm. We will explore how engineers must evolve from execution-focused contributors to strategic decision-makers, integrating governance and strategy as core technical requirements in AI system design. Participants will learn how to bridge the gap between business vision and engineering reality by embedding strategy, governance, and ethical considerations directly into the development lifecycle. Additionally, the session will highlight practical strategies for women in tech to strengthen their influence—through confident communication, strategic thinking, and authentic leadership. Key Learning Objectives - Understand why many AI systems fail to transition from concept to production - Learn how to align engineering decisions with organizational strategy - Explore how to embed governance and safety into AI pipelines - Develop a strategic engineering mindset - Gain practical insights on influencing effectively as a woman in technology Who Should Attend - Engineers and AI practitioners - Early-career professionals and students - Technical leaders and project managers - Anyone interested in AI strategy, governance, and leadership development Speaker(s): Kierra Dotson Agenda: - Welcome & Overview of IEEE WIE Oregon Section Affinity Group - Invited talk from Kierra Dotson - Q/A Session Virtual: https://events.vtools.ieee.org/m/553802

Diamond Semiconductor Device Design & Fabrication [] Abstract: Diamond Quanta: making diamond as available as silicon Laser Annealing for Electronic-Quality Diamond Abstract: Diamond’s extreme thermal conductivity, wide bandgap, high breakdown field, stiffness, and radiation hardness make it a compelling platform for power microelectronics, photonics, and quantum technologies. But its performance is often limited by defects that scatter carriers, perturb color-center environments, and degrade quantum coherence. Conventional polishing and growth processes typically create defects near the surface, where they will have the greatest impact on electronic and optical performance. For many applications, a key challenge is to convert commercially available diamond plates into device-ready surfaces over large areas. In collaboration with Lawrence Livermore Lab, Diamond Quanta is developing sub-melt nanosecond Pulsed‑Laser Annealing (PLA) - a controllable, scalable means to reconfigure carbon bonding and relieve near‑surface strain without melting. This method produces low-defect, device-ready surfaces from industrial-grade diamond, with applications in high-power electronics, photonics, and quantum-grade substrates and wafers. Read More: (https://arxiv.org/abs/2512.08719v1) (https://link.springer.com/article/10.1557/s43580-025-01206-x) Speaker: Adam Khan Founder & CEO Diamond Quanta AGENDA: Thursday April 23, 2026 11:30 AM: Networking, Pizza & Drinks Noon -- 1 pm: Seminar Please register on Eventbrite before 9:30 AM on Thursday April 23, 2026 $4 IEEE members $6 non IEEE members (discounts for unemployed and students ) Bldg: ==> Use corner entrance: Kifer Road / San Lucar Court ==> Do not enter at main entrance on Kifer Road, EAG Labs, 810 Kifer Road, Sunnyvale, California, California, United States, 95051

Datacenter workload fluctuations challenge the design and operation of our critical grid infrastructure. Significant gaps exist in assessment of these fluctuations as to their lifetime and short-term impact on the infrastructure and environment. Some mitigation approaches focus on throttling the datacenter workload, thus impacting the performance. Other approaches include use of alternate generation sources or energy storage systems. While disparate, these approaches are reactive and lack foresight and the intelligence to plan and strategize for optimal power management. We introduce an approach to quantify the transitional entropy generated during datacenter power fluctuations as a metric to evaluate datacenter performance using power demand measurements. A comparative assessment is provided between a BESS optimized datacenter and a regular datacenter to demonstrate the reduction of irreversibilities due to power fluctuations. Workloads are used to characterize the datacenter power demand at the point of interaction with utility. This approach can be scaled from datacenters to servers to chips. Speaker(s): Ratnesh K Sharma, Agenda: No-host social at 5:30pm Presentation at 6:00pm Dinner at 7:00pm Presentation continues at 7:45pm Adjourn by 8:30pm Zio Fraedo's, 611 Gregory Lane, Pleasant Hill, California, United States, 94523

Overview Webinar EDS SCV/SF event, Topic: "Robustness and Reliability of Wide Bandgap Power Semiconductors", Presenter: Dr. Layi Alatise "Robustness and Reliability of Wide Bandgap Power Semiconductors" Lecture by Dr. Layi Alatise The Electron Devices Society Santa Clara Valley/San Francisco joint Chapter and Device Reliability Physics committee are hosting Dr. Layi Alatise When: Friday, April 24th, 2026 – 11:45AM to 1:15PM (PDT) 11:45AM - 12PM: Introduction 12PM-12:45PM: Lecture 12:45PM-12:55PM: Q&A 1PM Adjourn Where: Zoom Zoom This is an online event ONLY and attendees can participate via Zoom. We will send the Zoom meeting information to registrants one day before the meeting. Please make sure you register. Contact: ieeescveds at gmail.com Speaker: Dr. Layi Alatise Abstract: Wide bandgap devices are increasingly penetrating the automotive market and are becoming prime candidates for implementation in applications like traction inverters and battery chargers. The mission profile of the traction inverter is a particularly aggressive one since the electrothermal stresses on the power devices vary significantly in amplitude and frequency as the motor drive goes through various stages of the drive cycle including acceleration, deceleration, stalling etc. Historically, the traction converter has been implemented using silicon devices where the performance and reliability is well known and understood. Application of WBG devices like SiC MOSFETs and GaN power devices in automotive applications requires understanding of the reliability and qualification procedures especially according to the automotive standard. SiC and GaN power devices have varying internal physics and modes of operation with vastly varying robustness and reliability performance compared to silicon devices. Given the sensitive nature of the application, these devices must pass stringent automotive reliability tests and guidelines defined by the Automotive Electronics Council (AEC), the Joint Electron Device Engineering Council (JEDEC-JC70) and the European Centre of power electronics (AQG). Virtual: https://events.vtools.ieee.org/m/555035

Overview Webinar EDS SCV/SF event, Topic: "Robustness and Reliability of Wide Bandgap Power Semiconductors", Presenter: Dr. Layi Alatise "Robustness and Reliability of Wide Bandgap Power Semiconductors" Lecture by Dr. Layi Alatise The Electron Devices Society Santa Clara Valley/San Francisco joint Chapter and Device Reliability Physics committee are hosting Dr. Layi Alatise When: Friday, April 24th, 2026 – 11:45AM to 1:15PM (PDT) 11:45AM - 12PM: Introduction 12PM-12:45PM: Lecture 12:45PM-12:55PM: Q&A 1PM Adjourn Where: Zoom Zoom This is an online event ONLY and attendees can participate via Zoom. We will send the Zoom meeting information to registrants one day before the meeting. Please make sure you register. Contact: ieeescveds at gmail.com Speaker: Dr. Layi Alatise Abstract: Wide bandgap devices are increasingly penetrating the automotive market and are becoming prime candidates for implementation in applications like traction inverters and battery chargers. The mission profile of the traction inverter is a particularly aggressive one since the electrothermal stresses on the power devices vary significantly in amplitude and frequency as the motor drive goes through various stages of the drive cycle including acceleration, deceleration, stalling etc. Historically, the traction converter has been implemented using silicon devices where the performance and reliability is well known and understood. Application of WBG devices like SiC MOSFETs and GaN power devices in automotive applications requires understanding of the reliability and qualification procedures especially according to the automotive standard. SiC and GaN power devices have varying internal physics and modes of operation with vastly varying robustness and reliability performance compared to silicon devices. Given the sensitive nature of the application, these devices must pass stringent automotive reliability tests and guidelines defined by the Automotive Electronics Council (AEC), the Joint Electron Device Engineering Council (JEDEC-JC70) and the European Centre of power electronics (AQG). Virtual: https://events.vtools.ieee.org/m/555035

Monthly AdCom meeting: 1. Welcome - Hualiang 2. Symposium status update - Annette/Paul/Hualiang 3. Education outreach status - Masha/Azmat/Hualiang 4. Chapter Storage - Hualiang XXXX NOT 5. Monthly talk preparation - Chandan/Luu 6. Chapter website update - XXXX NOT Venkatesh/Claire/Paul 7. Senior member advancement - Dwayne Xxxx NOT 8: Election 2026 9: Open discussion - All Agenda: Monthly AdCom meeting: 1. Welcome - Hualiang 2. Symposium status update - Annette/Paul/Hualiang 3. Education outreach status - Masha/Azmat/Hualiang 4. Chapter Storage - Hualiang XXXX NOT 5. Monthly talk preparation - Chandan/Luu 6. Chapter website update - XXXX NOT Venkatesh/Claire/Paul 7. Senior member advancement - Dwayne Xxxx NOT 8: Election 2026 9: Open discussion - All Virtual: https://events.vtools.ieee.org/m/549396

We are excited to continue the Orange County Computer Society (OCCS) Global Emerging Technologies (GET) Series—a monthly platform dedicated to spotlighting transformative innovations in computer science and technology. Hosted by the IEEE Orange County Computer Society Chapter, this series brings together professionals, students, and tech enthusiasts to explore the cutting edge of what’s possible. Following a highly engaging March session filled with thought-provoking conversations on Advancement in Digital healthcare , we’re thrilled to bring you a powerful double-feature this April—exploring both the strategic and technical sides of artificial intelligence. Curious about Generative AI? This hands-on lab simplifies core concepts—from tokens and LLMs to RAG, Agents, and MCP—while showing how they work together in real systems. By the end, you’ll gain the skills and confidence to build your own AI-powered applications. Session 1: Understanding Generative AI — Core Principles and Industry Impact (40 mins) 1. What is GenAI Understand how AI generates content and why it’s transforming every industry. 2. Tokens & How LLMs Think Learn how text is broken into tokens and how that impacts cost, speed, and output. 3. Models & Ecosystem Explore key GenAI players and choose the right model for your use case. 4. Prompting (Vibe Programming) Master the art of guiding AI using structured, effective prompts. 5. RAG (Retrieval-Augmented Generation) Enhance AI accuracy by grounding responses in your own data. 6. Agents (Automation Layer) Move beyond chatbots to AI systems that can reason, plan, and take actions. 7. MCP (Tool Integration Layer) Enable AI to securely discover and interact with real-world tools and APIs. Session 2: GenAI in Action — From Prompt to Working Prototype (60 mins) 1. Hands-On Build Follow along in a live demo as we integrate concepts and build an AI-powered application in real time using Visual Studio Code and Python notebooks 2. Architecture & Best Practices Understand how all components fit together in a real-world AI system. 3. Next Steps The journey doesn’t end here—stay with us for what’s next. Gora Datta FHL7,SMIEEE,SMACM Chair IEEE Computer Society – OC Chapter Chair IEEE Engineering in Medicine and Biology Society (EMBS) - OC Chapter Chair & Board Member IEEE Blockchain Technical Community Founding Chair IEEE P3271.01 Working Group – Standard for Recurring Transactions Using Distributed Ledger Technologies (DLTs) 📧 gora.datta@ieee.org 🔗 LinkedIn: linkedin.com/in/goradatta Co-sponsored by: Gora Datta Speaker(s): Vinay, Pradyumna Kodgi Agenda: GenAI Unlocked: From Buzzwords to Breakthroughs Generative AI is no longer just a trend—it’s transforming how we create, innovate, and solve problems across industries. But what’s really behind all the excitement? In this interactive session, we’ll cut through the hype and help you truly understand Generative AI—without the jargon. 🔍 What you’ll explore: - What Generative AI actually is (in simple, practical terms) - How it works behind the scenes - Key concepts and terminology you’ll hear everywhere—explained clearly - Real-world use cases shaping industries today 💡 What makes this session different? This isn’t just theory. You’ll experience Generative AI in action through a live, interactive demo, where we’ll demo and explore real examples together. 🛠️ To keep the learning going, we’ll also share source code and hands-on resources so you can experiment, build, and deepen your understanding at your own pace. 🎯 Who should attend? - Beginners curious about AI - Professionals looking to understand GenAI fundamentals - Engineers, product managers, and innovators exploring AI adoption ✨ Walk away with: - A clear, confident understanding of Generative AI - The ability to engage in GenAI conversations without confusion - Practical exposure to how GenAI works in real scenarios Whether you're just getting started or looking to solidify your foundation, this session will kickstart your journey into the world of intelligent creation. 5270 California Ave , Irvine, California, United States, 92617, Virtual: https://events.vtools.ieee.org/m/553615

Shalini Lakshmana is inviting you to a scheduled Zoom meeting. Topic: SCV WIE Mar ExCom Meeting Time: Mar 26, 2026 06:00 PM Pacific Time (US and Canada) Every month on the 26 of the month, 36 occurrence(s) Monthly: https://zoom.us/meeting/tJArfumopzkpHtaky1j5fYpqwMUeY7hSmBWs/ics?icsToken=DLAvxr8efHNhT92mFgAALAAAAICuIz08PSYY6dBYKGdyAmG9V8apUVN2a4qZ15xYs4WT3mV-sSkt5z2I4R9S5HnEoBhV7EWs81CyNNkybzAwMDAwMQ&meetingMasterEventId=GF3_gS3WTzuUZDIP3DGSlw Join Zoom Meeting https://zoom.us/j/94690092342?pwd=7PGwqJDSorXhy8TcYD9alL0bucCPEc.1 Meeting ID: 946 9009 2342 Passcode: 9yPaX9 Agenda: - New member introductions - Past Events - Upcoming Events - Other agenda items Virtual: https://events.vtools.ieee.org/m/555229

Autonomous mobility is largely approached as a vehicle-centric problem. Persistent challenges in safety, scalability, and public trust suggest a deeper issue: “intelligence” is often considered in isolation rather than as distributed. This presentation argues that truly safe and trustworthy autonomy will emerge only through symbiotic computational systems, where perception, decision-making, and control are distributed across humans, machines, and infrastructure. The presentation starts with an overview of the four decades-long progress in autonomous driving and related advancements in driver assistance technologies. It is followed by a discussion of the central thesis: that many failures in autonomous mobility stem not from algorithms alone, but from how system boundaries are defined— what is sensed, where intelligence resides, and how responsibility is shared. Framing autonomy as a systems- level problem, the talk draws on principles of distributed and embodied cognition to unify perspectives from robotics, artificial intelligence, human–computer interaction, and transportation engineering. Concrete examples from multidisciplinary research by the CVRR and LISA teams at UC San Diego, conducted on real vehicles in real-world driving environments and validated through both quantitative benchmarks and qualitative studies in collaboration with industry partners, illustrate how shared autonomy can tightly couple human state (e.g., intent, attention, readiness) with environmental context to enable safer and more adaptive human–AI interaction. The lecture also discusses how advances in foundation models, self-supervised learning, and active learning can improve generalization and robustness in safety-critical settings. The talk concludes with key open challenges, including multimodal foundation models for traffic ecosystems, human–AI co-adaptation, and continual learning under domain shift, important problems to realize scalable, trustworthy autonomous mobility. Co-sponsored by: Vishnu S. Pendyala, San Jose State University Speaker(s): Professor Mohan Trivedi, Dr. Vishnu S Pendyala Room: MLK Room 225, Dr. Martin Luther King, Jr. Library (SJSU), 150 E San Fernando St San Jose, California 95112, San Jose, California, United States, Virtual: https://events.vtools.ieee.org/m/556950

Key Considerations for Successful High-Speed Board Design Ujjwal Datt Sharma Abstract: Successful high-speed board design requires more than meeting electrical and functional requirements. Engineers must make balanced decisions that affect performance, reliability, manufacturability, cost, and schedule across the full product lifecycle. This talk provides a practical overview of the key considerations that should guide high-speed board design from concept through implementation. It emphasizes the value of thoughtful early decisions in reducing downstream problems during validation and bring-up. Attendees will gain a broader understanding of how disciplined design practices can improve hardware quality and support smoother product development. Speaker biography: Ujjwal Datt Sharma is a Hardware Engineer with 10 years of experience in high-speed system design, signal integrity, and AI hardware architecture. He specializes in motherboard design, FPGA-based systems, and data center switch platforms. He holds a Bachelor of Science in Electrical and Electronics Engineering from Manipal Institute of Technology, Karnataka (KA), India, and a Master of Science in Electrical and Computer Engineering from the University of New Haven, Connecticut (CT). His work focuses on developing reliable, high-performance hardware systems for next-generation computing and networking applications. Agenda: Networking: 5:30pm-6pm Talk: 6p-7pm Room: SCDI 1308 , Bldg: SCDI (Sobrato Campus for Discovery and Innovation), 500 El Camino Real, Santa Clara, California, United States, 95053